參數資料
型號: SP37E760
廠商: SMSC Corporation
英文描述: 3.3 V I/O CONTROLLER FOR EMBEDDED APPLICATIONS
中文描述: 3.3第VI / O控制器為嵌入式應用
文件頁數: 18/78頁
文件大小: 510K
代理商: SP37E760
4.1.5.4
Writing to the DMA Mode Select bit has no effect on the operation of the UART. The RXRDY and TXRDY pins are
not available on this chip.
4.1.5.5
Reserved, Bits 4 - 5
Bits 4 to 5 are
RESERVED
. Reserved bits cannot be written and return 0 when read.
4.1.5.6
RCVR Trigger, Bits 6 - 7
The RCVR Trigger bits are used to set the trigger level for the RCVR FIFO interrupt (Table 6).
SMSC DS – SP37E760
Page 18
Rev. 04/13/2001
DMA Mode Select, Bit 3
Table 6 - RCVR Trigger Encoding
RCVR
TRIGGER
Bit 7
Bit 6
0
0
0
1
1
0
1
1
RCVR FIFO Trigger Level
(BYTES)
1
4
8
14
4.1.6
The Line Control register (Address Offset = 3H, DLAB = 0, READ/WRITE) contains the formatting information for the
serial line.
4.1.6.1
Word Length Select, Bits 0 - 1
The Word Length Select bits specify the number of bits in each transmitted or received serial character. Note: the
Start
,
Stop
and
Parity
bits are not included in the word length. The encoding of the Word Length bits is shown in
Table 7.
Table 7 - Word Length Encoding
WORD LENGTH
SELECT
WORD LENGTH (Bits)
Bit 1
Bit 0
0
0
0
1
1
0
1
1
4.1.6.2
Stop Bits, Bit 2
The Stop Bits bit specifies the number of stop bits in each transmitted or received serial character. Table 8 describes
the Stop Bits encoding.
Table 8 - STOP Bit Encoding
STOP BITS
(Bit 2)
LENGTH
0
-
0
5
Bits
1
6 Bits
1
7 Bits
1
8 Bits
Note:
The receiver ignores stop bits beyond the first, regardless of the number of stop bits used in transmitting.
LINE CONTROL REGISTER (LCR)
5
6
7
8
WORD
NUMBER OF
STOP BITS
1
1.5
2
2
2
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SP37E760-MC 制造商:SMSC 制造商全稱:SMSC 功能描述:3.3 V I/O CONTROLLER FOR EMBEDDED APPLICATIONS
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