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參數(shù)資料
| 型號： | SP8720BDG |
| 廠商： | General Electric Company |
| 英文描述： | ECL two-modulus divider, with ECL10K compatible outputs |
| 中文描述： | ECL兩分頻器，與ECL10K兼容輸出 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 107K |
| 代理商： | SP8720BDG |
ABSOLUTE MAXIMUM RATINGS
Supply voltage
Output current
Storage temperature range
Max. junction temperature
Max. clock input voltage
SP8720
300MHz
4
3/4
DS3650-1·2
The SP8720 is an ECL two-modulus divider, with ECL10K
compatible outputs. It divides by 3 when either of the ECL control
inputs, PE1 or PE2, is in the high state and by 4 when both are low
(or open circuit). An AC coupled input of 600mVp-p is required.
FEATURES
I
ECL Compatible Outputs
I
AC-Coupled Input (Internal Bias)
I
Control Inputs ECL III/10K Compatible
QUICK REFERENCE DATA
I
Supply Voltage:
2
5·2V
I
Power Consumption: 240mW
I
Temperature Range:
2
55
°
C to
1
125
°
C (A Grade)
2
30
°
C to
1
70
°
C (B Grade)
Fig. 1 Pin connections - top view
DG16
2
8V
20mA
2
65
°
C to
1
150
°
C
1
175
°
C
2·5V p-p
ORDERING INFORMATION
SP8720 A DG
SP8720 B DG
5962-90577 (SMD)
Fig. 2 Functional diagram
CLOCK INPUT
PE1
PE2
NC
V
CC
NC
NC
OUTPUT
INTERNAL BIAS DECOUPLING
NC
NC
NC
V
EE
DO NOT CONNECT
NC
OUTPUT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CONTROL
INPUTS
SP8720
V
CC
(0V)
D1
CK
Q1
D2
CK
Q2
PE1
PE2
CLOCK INPUT
OUTPUT
OUTPUT
V
EE
2
3
1
5
12
8
9
INTERNAL BIAS
DECOUPLING
16
Q2
ADVANCE INFORMATION
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