參數(shù)資料
型號: SMJ44C251B
廠商: Texas Instruments, Inc.
英文描述: 262144 BY 4-BIT MULTIPORT VIDEO RAM
中文描述: 262144 4位多端口視頻內(nèi)存
文件頁數(shù): 49/53頁
文件大?。?/td> 913K
代理商: SMJ44C251B
SMJ44C251B
262144 BY 4-BIT
MULTIPORT VIDEO RAM
SGMS058A – MARCH 1995 – REVISED JUNE 1995
49
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
PARAMETER MEASUREMENT INFORMATION
tw(SCH)
tw(SCL)
tw(SCH)
tw(SCL)
tw(SCH)
th(TRG)
tsu(TRG)
tsu(SDS)
th(SDS)
tc(SC)
tc(SC)
RAS
TRG
SC
SDQ0–SDQ3
Valid In
Valid In
tsu(SDS)
th(SDS)
SE
td(SESC)
th(SCSE)
tw(SEH)
tsu(SESC)
tw(SEL)
td(SCSE)
td(SESC)
NOTES: A. The serial data-in cycle is used to input serial data into the data registers. Before data can be written into the data registers via the
SDQ terminals, the device must be put into the write mode by performing a write-mode-control (pseudo-transfer) cycle or any other
write-transfer cycle. A read-transfer cycle is the only cycle that takes the serial port (SAM) out of the write mode and puts it into the
read mode, disabling the input data. Data is written starting at the location specified by the input address loaded on the previous
transfer cycle.
B. While accessing data in the serial-data registers, the state of TRG is a don’t care as long as TRG is held high when RAS goes low
to prevent data transfers between memory and data registers.
Figure 37. Serial-Write-Cycle Timing (SE-Controlled Write)
相關(guān)PDF資料
PDF描述
SMJ4C1024-10HJ 1048576 BY 1-BIT DYNAMIC RANDOM-ACCESS MEMORY
SMJ4C1024-10HK 1048576 BY 1-BIT DYNAMIC RANDOM-ACCESS MEMORY
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SMJ4C1024-10JD 1048576 BY 1-BIT DYNAMIC RANDOM-ACCESS MEMORY
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