參數(shù)資料
型號: SMJ44C251B
廠商: Texas Instruments, Inc.
英文描述: 262144 BY 4-BIT MULTIPORT VIDEO RAM
中文描述: 262144 4位多端口視頻內(nèi)存
文件頁數(shù): 12/53頁
文件大小: 913K
代理商: SMJ44C251B
SMJ44C251B
262144 BY 4-BIT
MULTIPORT VIDEO RAM
SGMS058A – MARCH 1995 – REVISED JUNE 1995
12
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
block write cycle (continued)
DQ MASK
COLUMN
MASK
COLOR
REGISTER
DATA
COLUMN 1
COLUMN 2
COLUMN 3
COLUMN 4
DQ0
1
0
0
DQ0
Masked
0
0
0
DQ1
1
1
0
Block Write
DQ1
Masked
0
0
0
DQ2
0
1
1
DQ2
Masked
Masked
Masked
Masked
DQ3
1
1
1
DQ3
Masked
1
1
1
Figure 4. Example of Block Write Operation With DQ Mask and Address Mask
transfer operation
Transfer operations between the memory arrays (DRAM) and the data registers (SAM) are invoked by bringing
TRG low before RAS falls. The states of W, SE, and DSF, which are also latched on the falling edge of RAS,
determine which transfer operation is invoked. Figure 5 shows an overview of data flow between the random
and the serial interfaces.
DQ0–DQ3
Col
511
Col
0
Random-Access Port
Col
255
Row
0
Row
511
256
256-Bit Data Register
Transfer-
Control
Logic
Serial
Counter
Serial-
I/O
Control
TRG
A8
DSF
W
SE
Transfer-
Pass
Gate
Col
256
Memory Array
262 144 Bits
256
Transfer-
Pass
Gate
SC
A0–A8
A8
SDQ0–SDQ3
256
256
256-Bit Data Register
MUX
SE
TRG
W
4
4
Figure 5. Block Diagram Showing One Random and One Serial-I/O Interface
相關(guān)PDF資料
PDF描述
SMJ4C1024-10HJ 1048576 BY 1-BIT DYNAMIC RANDOM-ACCESS MEMORY
SMJ4C1024-10HK 1048576 BY 1-BIT DYNAMIC RANDOM-ACCESS MEMORY
SMJ4C1024-10HL 1048576 BY 1-BIT DYNAMIC RANDOM-ACCESS MEMORY
SMJ4C1024-10JD 1048576 BY 1-BIT DYNAMIC RANDOM-ACCESS MEMORY
SMJ4C1024-10SV 1048576 BY 1-BIT DYNAMIC RANDOM-ACCESS MEMORY
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