參數(shù)資料
型號： SII3124A
廠商： Silicon Image, Inc.
英文描述： PCI-X to Serial ATA Controller
中文描述： PCI - X到串行ATA控制器
文件頁數(shù)： 78/88頁
文件大?。?/td> 621K
代理商： SII3124A
PCI-X to Serial ATA Controller
Data Sheet
7.3.16 Port PHY Configuration
Address Offset: 1050
H
Access Type: Read/Write
Reset Value: 0x0000_020C
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0160-C
78
PHY Status
PHY Config
Tx Amplitude
The Port PHY Configuration register is reset by the Global Reset, not by the Port Reset. The reset value is 0x0000020C.
Bit[31:16]
: PHY Status (R). These bits report status of the PHY (currently always 0).
Bit[15:5]
: PHY Config (R/W). These bits configure the PHY. The value should not be changed as erratic operation may
result.
Bit[4:0]
: Tx Amplitude (R/W) These bits set the nominal output swing for the Transmitter. The amplitude will be increased
by 50mV by an increment of the value.
7.3.17 Port Device Status Register
Address Offset: F80
H
(PM Port 0)/ F88
H
(PM Port 1)
/ F90
H
(PM Port 2)
/ F98
H
(PM Port 3)
/ FA0
H
(PM Port 4)
/ FA8
H
(PM Port
5)
/ FB0
H
(PM Port 6)
/ FB8
H
(PM Port 7)
/ FC0
H
(PM Port 8)
/ FC8
H
(PM Port 9)
/ FD0
H
(PM Port 10)
/ FD8
H
(PM Port 11)
/
FE0
H
(PM Port 12)
/ FE8
H
(PM Port 13)
/ FF0
H
(PM Port 14)
/ FF8
H
(PM Port 15)
Access Type: Read/Write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Reserved
s
l
n
d
exec_active_slot
pio_end_status
These 16 registers contain information useful for diagnosing behavior of the execution unit. These 16 registers contain Port
Multiplier device specific information. Address Offset bits 6 to 3 are the Port Multiplier Port number for the device to which the
status bits apply. There is one register for each of 16 possible port multiplier ports. These registers are part of the LRAM.
Bit [31:17]
: Reserved
Bit [16]
: service_pending (R/W). Indicates that a service request has been received from this device and a
SERVICE command has not yet been acknowledged.
Bit [15]
: legacy_queue (R/W). Indicates that one or more legacy queued commands are outstanding to this
device.
Bit [14]
: native_queue (R/W). Indicates that one or more native queued commands are outstanding to this
device.
Bit [13]
: device_busy (R/W). Virtual BSY bit indicating that a command has been issued to the device without
receipt of a final register FIS or that a data transfer is in progress.
Bit [12:08]
: exec_active_slot (R/W). Contains the slot number of the last command active on this device.
Bit [07:00]
: pio_end_status (R/W). Contains the PIO ending status of the last PIO setup command received
from this device.
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