參數(shù)資料
型號： SiI3114
廠商： Silicon Image, Inc.
英文描述： PCI to Serial ATA Controller
中文描述： PCI到Serial ATA控制器
文件頁數(shù)： 11/127頁
文件大?。?/td> 598K
代理商： SII3114
SiI
3114 PCI to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
Configuration Read
Configuration Write
Memory Read
Memory Write
All other PCI cycles are ignored by the
SiI
3114.
2007 Silicon Image, Inc.
3
SiI
-DS-0103-D
As a PCI master, the
SiI
3114 generates the following PCI bus operations:
Memory Read Multiple
Memory Read
Memory Write
PCI Configuration Space
This section describes how the
SiI
3114 implements the required PCI configuration register space. The intent of
PCI configuration space definition is to provide an appropriate set of configuration registers that satisfy the needs
of current and anticipated system configuration mechanisms, without specifying those mechanisms or otherwise
placing constraints on their use. These registers allow for:
Full device relocation (including interrupt binding)
Installation, configurations, and booting without user interventions
System address map construction by device-independent software
Figure 1 illustrates the address line assignments during the configuration cycle.
Figure 1. Address Lines During Configuration Cycle
The
SiI
3114 only responds to Type 0 configuration cycles. Type 1 cycles, which pass a configuration request on
to another PCI bus, are ignored.
The address phase during a
SiI
3114 configuration cycle indicates the function number and register number being
addressed which can be decoded by observing the status of the address lines AD[31:0].
The value of the signal lines AD[7:2] during the address phase of configuration cycles selects the register of the
configuration space to access. Valid values are between 0 and 15, inclusive. Accessing registers outside this
range results in an all-0s value being returned on reads, and no action being taken on writes.
The Class Code register contains the Class Code, Sub-Class Code, and Register-Level Programming Interface
registers.
All writable bits in the configuration space except offset 44h, 8Ch are reset to their defaults by the hardware reset,
PCI RESET (RST#) asserted. After reset, the
SiI
3114 is disabled and will only respond to PCI configuration write
and PCI configuration read cycles.
Deviations from the Specification
The
SiI
3114 product has been developed and tested to the specification listed in this document. As a result of
testing and customer feedback, we may become aware of deviations to the specification that could affect the
component's operation. To ensure awareness of these deviations by anyone considering the use of the
SiI
3114,
we have included an Errata section at the end of this specification. Please ensure that the Errata section is
31
11 10
8 7
2 1
0
Bit
Number
Don’t Care
Bit
Number
3-Bit
Function
Number
6-Bit
Register
Number
2-Bit
Type
Number
相關(guān)PDF資料
PDF描述
SII3114_07 PCI to Serial ATA Controller
SiI3114CT176 PCI to Serial ATA Controller
SiI3114CTU PCI to Serial ATA Controller
SII3124A PCI-X to Serial ATA Controller
SiI3124ACBHU PCI-X to Serial ATA Controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SII3114_07 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI to Serial ATA Controller
SII3114CT176 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI to Serial ATA Controller
SII3114CTU 制造商:Silicon Image Inc 功能描述:PCI to Serial ATA Controller 176-Pin TQFP 制造商:SILICON 功能描述:
SII3124A 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI-X to Serial ATA Controller
SII3124ACBHU 制造商:SILICONIMAGE 制造商全稱:SILICONIMAGE 功能描述:PCI-X to Serial ATA Controller
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