參數(shù)資料
型號： SC16C752IB48,157
廠商： NXP Semiconductors
文件頁數(shù)： 47/47頁
文件大小： 0K
描述： IC DUAL UART 64BYTE 48LQFP
標(biāo)準(zhǔn)包裝： 1,250
通道數(shù)： 2，DUART
FIFO's： 64 字節(jié)
電源電壓： 2.5V，3.3V，5V
帶自動流量控制功能： 是
帶故障啟動位檢測功能： 是
帶調(diào)制解調(diào)器控制功能： 是
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 托盤
其它名稱： 935270055157
SC16C752IB48
SC16C752IB48-ND
Philips Semiconductors
SC16C752
Dual UART with 64-byte FIFO
Product data
Rev. 04 — 20 June 2003
9 of 47
9397 750 11635
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
6.3 Software ow control
Software ow control is enabled through the enhanced feature register and the
modem control register. Different combinations of software ow control can be
enabled by setting different combinations of EFR[3:0]. Table 3 shows software ow
control options.
Remark: When using software ow control, the Xon/Xoff characters cannot be used
for data characters.
There are two other enhanced features relating to software ow control:
Xon Any function (MCR[5]): Operation will resume after receiving any character
after recognizing the Xoff character. It is possible that an Xon1 character is
recognized as an Xon Any character, which could cause an Xon2 character to be
written to the RX FIFO.
Special character (EFR[5]): Incoming data is compared to Xoff2. Detection of the
special character sets the Xoff interrupt (IIR[4]) but does not halt transmission. The
Xoff interrupt is cleared by a read of the IIR. The special character is transferred to
the RX FIFO.
6.3.1
RX
When software ow control operation is enabled, the SC16C752 will compare
incoming data with Xoff1,2 programmed characters (in certain cases, Xoff1 and Xoff2
must be received sequentially). When the correct Xoff character are received,
transmission is halted after completing transmission of the current character. Xoff
detection also sets IIR[4] (if enabled via IER[5]) and causes INT to go HIGH.
To resume transmission, an Xon1,2 character must be received (in certain cases
Xon1 and Xon2 must be received sequentially). When the correct Xon characters are
received, IIR[4] is cleared, and the Xoff interrupt disappears.
Table 3:
Software ow control options (EFR[0:3])
EFR[3]
EFR[2]
EFR[1]
EFR[0]
TX, RX software ow controls
0
X
no transmit ow control
1
0
X
transmit Xon1, Xoff1
0
1
X
transmit Xon2, Xoff2
1
X
transmit Xon1, Xon2, Xoff1, Xoff2
X
0
no receive ow control
X
1
0
receiver compared Xon1, Xoff1
X
0
1
receiver compares Xon2, Xoff2
1011transmit Xon1, Xoff1
receiver compares Xon1 and Xon2, Xoff1 and Xoff2
0111transmit Xon2, Xoff2
receiver compares Xon1 and Xon2, Xoff1 and Xoff2
1111transmit Xon1, Xon2, Xoff1, Xoff2
receiver compares Xon1 and Xon2, Xoff1 and Xoff2
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