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參數(shù)資料
| 型號(hào)： | SC1200 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Precision Analog-to-Digital Converter (ADC) and Digital-to-Analog Converter (DAC) with 8051 Microcontroller and Flash Memory |
| 中文描述： | 精密模擬到數(shù)字轉(zhuǎn)換器（ADC）和數(shù)字到模擬轉(zhuǎn)換器（DAC）的8051微控制器和閃存 |
| 文件頁(yè)數(shù)： | 25/60頁(yè) |
| 文件大?。?/td> | 802K |
| 代理商： | SC1200 |
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MSC1200
SBAS289E
25
www.ti.com
FIGURE 20. Scratchpad Register Addressing.
7F
H
2F
H
2D
H
2E
H
2C
H
2B
H
2A
H
29
H
28
H
27
H
26
H
25
H
24
H
23
H
22
H
21
H
20
H
1F
H
18
H
17
H
10
H
0F
H
08
H
07
H
7F
7E
7D
7C
7B
7A
79
78
77
76
75
74
73
72
71
70
6F
6E
6D
6C
6B
6A
69
68
67
66
65
64
63
62
61
60
5F
5E
5D
5C
5B
5A
59
58
57
56
55
54
53
52
51
50
4F
4E
4D
4C
4B
4A
49
48
47
46
45
44
43
42
41
40
3F
3E
3D
3C
3B
3A
39
38
37
36
35
34
33
32
31
30
2F
2E
2D
2C
2B
2A
29
28
27
26
25
24
23
22
21
20
1F
1E
1D
1C
1B
1A
19
18
17
16
15
14
13
12
11
10
0F
0E
0D
0C
0B
0A
09
08
07
06
05
04
03
02
01
00
00
H
Direct
RAM
Bank 3
B
Bank 2
Bank 1
Bank 0
MSB
LSB
It is important to note that the Flash Memory is readable and
writable (depending on the MXWS bit in the MWS SFR) by
the user through the MOVX instruction when configured as
either Program or Data Memory. This means that the user
may partition the device for maximum Flash Program Memory
size (no Flash Data Memory) and use Flash Program Memory
as Flash Data Memory. This may lead to undesirable behav-
ior if the PC points to an area of Flash Program Memory that
is being used for data storage. Therefore, it is recommended
to use Flash partitioning when Flash Memory is used for data
storage. Flash partitioning prohibits execution of code from
Data Flash Memory. Additionally, the Program Memory erase/
write can be disabled through hardware configuration bits
(HCR0), while still providing access (read/write/erase) to
Data Flash Memory.
The effect of memory mapping on Program and Data Memory
is straightforward. The Program Memory is decreased in size
from the top of Flash Memory. To maintain compatibility with
the MSC121x, the Flash Data Memory maps to addresses
0400
H
. Therefore, access to Data Memory (through MOVX)
will access Flash Memory for the addresses shown in
Table IV.
Data Memory
The MSC1200 has on-chip Flash Data Memory, which is
readable and writable (depending on Memory Write Select
register) during normal operation (full V
DD
range). This memory
is mapped into the external Data Memory space, which
requires the use of the MOVX instruction to program. Note
that the page size is 64 bytes for both Program and Data
Memory and the page must be erased before it can be
written.
REGISTER MAP
The Register Map is illustrated in Figure 19. It is entirely
separate from the Program and Data Memory areas men-
tioned before. A separate class of instructions is used to
access the registers. There are 128 register locations. In
practice, the MSC1200 has 128 bytes of Scratchpad RAM
and up to 128 SFRs. Thus, a direct reference to one of the
upper 128 locations will be an SFR access. Direct RAM is
reached at locations 0 to 7F
H
(0 to 127).
SFRs are accessed directly between 80
H
and FF
H
(128 to
255). Scratchpad RAM is available for general-purpose data
storage. It is commonly used in place of off-chip RAM when
the total data contents are small. Within the 128 bytes of
RAM, there are several special-purpose areas.
Bit Addressable Locations
In addition to direct register access, some individual bits are
also accessible. These are individually addressable bits in
both the RAM and SFR area. In the Scratchpad RAM area,
registers 20
H
to 2F
H
are bit addressable. This provides 128
(16
8) individual bits available to software. A bit access is
distinguished from a full-register access by the type of
instruction. In the SFR area, any register location ending in
a 0
H
or 8
H
is bit addressable. Figure 20 shows details of the
on-chip RAM addressing including the locations of individual
RAM bits.
FIGURE 19. Register Map.
FF
H
255
128
127
0
80
H
7F
H
00
H
Direct
Scratchpad
RAM
Direct
Special Function
Registers
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