
SAB 82532/SAF 82532
ASYNC Mode
Detailed Register Description
Semiconductor Group
188
07.96
Transmit Immediate Character (TIC)
(Version 2 upwards)
Access: write
address: ch-A: 35
H
ch-B: 75
H
When a character is written into this register its contents are inserted in the outgoing
character stream
– immediately upon writing this register by the microprocessor if the transmitter is in
IDLE state. If no further characters (XFIFO contents) are to be transmitted, i.e. the
transmitter returns to IDLE state after transmission of TIC, an ALLS (All Sent) interrupt
will be generated,
– after the end of a character currently being transmitted. This does not affect the
contents of the XFIFO. Transmission of characters from XFIFO is resumed after the
contents of register TIC are shifted out.
Transmission via this register is possible even when the transmitter is in XOFF state
(however, CTS must be ‘low’).
The TIC register is an eight-bit register. The number of significant bits is determined
by the programmed character length (right justified). Parity value (if programmed) and
selected number of stop bits are automatically appended, similar to the characters
written in the XFIFO. The usage of TIC is independent of the flow control, i.e. is not
affected by bit MODE.FLON.
To control access to register TIC, an additional status bit STAR:TEC (TIC Executing)
is implemented which indicates that transmission instruction of currently programmed
TIC is accepted but not completely executed. Further access to register TIC is only
allowed if bit STAR:TEC is reset by the ESCC2.
7
0
TIC
TIC7
TIC0