
SAB 82532/SAF 82532
Detailed Register Description
Semiconductor Group
136
07.96
ODS …
Output Driver Select
Defines the function of the transmit data pin (TxD)
0 … TxD pin is an open drain output.
1 … TxD pin is a push-pull output.
Note: This feature is also valid for pin RxD if it is switched to
TxD function via bit CCR2:SOC1.
Interframe Time-Fill / One Insertion
The function of this bit depends on the selected Serial Port
Configuration (bit SC1):
Point-to-point configurations: ITF
Determines the idle (= no data to send) state of the transmit
data pin TxD
0 … Continuous logical ‘1’ is output
1 … Continuous FLAG sequences are output (‘01111110’-bit
patterns)
Bus configurations: OIN
When this bit is set, a ‘ONE’ insertion (deletion) mechanism is
activated: a ‘1’ is inserted after seven consecutive ‘0’s in the
transmit data stream and a ‘1’ is deleted after seven
consecutive ‘0’ in the receive data stream.
Similar to the HDLC bit stuffing mechanism (inserting a ‘0’ after
five consecutive ‘1’s), this enables clock information to be
recovered from the receive data stream by means of a DPLL
even in the case of NRZ encoding, because a transition at bit
cell boundary occurs at least every 7 bits. The ‘One Insertion’
cannot be used in conjunction with the master clock option.
Note: In bus configurations, the ITF is implicitly set to ‘0’, i.e.
continuous ‘1’s are transmitted, and data encoding is NRZ.
Clock Mode
Selects one of 8 different clock modes:
000 clock mode 0
.
.
.
.
.
.
111 clock mode 7
ITF/OIN …
CM2 … CMO …
HDLC Mode