參數(shù)資料
型號(hào): S71WS512NC0BFWY63
廠商: Spansion Inc.
英文描述: Stacked Multi-Chip Product (MCP)
中文描述: 堆疊式多芯片產(chǎn)品(MCP)
文件頁(yè)數(shù): 117/188頁(yè)
文件大小: 2252K
代理商: S71WS512NC0BFWY63
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September 15, 2005 S71WS-N_01_A4
S71WS-Nx0 Based MCPs
115
A d v a n c e I n f o r m a t i o n
26 Low Power Features
26.7
Partial Array Refresh (PAR) mode
The PAR mode enables the user to specify the active memory array size. This device consists of
4 blocks and the user can select 1 block, 2 blocks, 3 blocks or all blocks as active memory arrays
through the Mode Register Setting. The active memory array is periodically refreshed whereas
the disabled array is not refreshed, so the previously stored data is lost. Even though PAR mode
is enabled through the Mode Register Setting, PAR mode execution by the MRS# pin is still
needed.
The normal operation can be executed even in refresh-disabled array as long as the MRS# pin is
not driven to the Low condition for over 0.5 μs. Driving the MRS# pin to the High condition puts
the device back to the normal operation mode from the PAR executed mode. Refer to
Figure 26.1
and
Table 26.1
for PAR operation and PAR address mapping.
Figure 26.1 PAR Mode Execution and Exit
Table 26.1 PAR Mode Characteristics
Notes:
1.
2.
Only the data in the refreshed block are valid.
The PAR Array can be selected through Mode Register Set (see
Mode Register Setting Operation
).
26.8
Driver Strength Optimization
The optimization of output driver strength is possible through the mode register setting to adjust
for the different data loadings. Through this driver strength optimization, the device can minimize
the noise generated on the data bus during read operation. The device supports full drive, 1/2
drive and 1/4 drive.
26.1
Internal TCSR
The internal Temperature Compensated Self Refresh (TCSR) feature is a very useful tool for re-
ducing standby current at room temperature (below 40°C). DRAM cells have weak refresh
characteristics in higher temperatures. High temperatures require more refresh cycles, which can
lead to standby current increase.
Without the internal TCSR, the refresh cycle should be set at worst condition so as to cover the
high temperature (85°C) refresh characteristics. But with internal TCSR, a refresh cycle below
40°C can be optimized, so the standby current at room temperature can be greatly reduced. This
feature is beneficial since most mobile phones are used at or below 40°C in the phone standby
mode.
Power Mode
Address
(Bottom Array)
(
Note 2
)
000000h ~ 3FFFFFh
000000h ~ 2FFFFFh
000000h ~ 1FFFFFh
000000h ~ 0FFFFFh
Address
(Top Array)
(
Note 2
)
000000h ~ 3FFFFFh
100000h ~ 3FFFFFh
200000h ~ 3FFFFFh
300000h ~ 3FFFFFh
Memory Cell
Data
Standby Current
(μA, Max)
Wait Time
(μs)
Standby (Full Array)
Partial Refresh(3/4 Block)
Partial Refresh(1/2 Block)
Partial Refresh(1/4 Block)
Valid (
Note 1
)
TBD
TBD
TBD
TBD
0
MRS#
MODE
CS#
Normal
Operation
0.5
μ
s
Suspend
PAR mode
Normal
Operation
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