參數(shù)資料
型號(hào): S71PL129JA0BFI9P2
廠商: SPANSION LLC
元件分類: 存儲(chǔ)器
英文描述: Stacked Multi-Chip Product (MCP) Flash Memory
中文描述: SPECIALTY MEMORY CIRCUIT, PBGA64
封裝: 8 X 11.60 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-64
文件頁數(shù): 58/149頁
文件大?。?/td> 2693K
代理商: S71PL129JA0BFI9P2
58
S29PL129J for MCP
S29PL129J_MCP_00_A0 June 4, 2004
A d v a n c e I n f o r m a t i o n
RY/BY#: Ready/Busy#
The RY/BY# is a dedicated, open-drain output pin which indicates whether an
Embedded Algorithm is in progress or complete. The RY/BY# status is valid after
the rising edge of the final WE# pulse in the command sequence. Since RY/BY#
is an open-drain output, several RY/BY# pins can be tied together in parallel with
a pull-up resistor to V
CC
.
If the output is low (Busy), the device is actively erasing or programming. (This
includes programming in the Erase Suspend mode.) If the output is high (Ready),
the device is in the read mode, the standby mode, or one of the banks is in the
erase-suspend-read mode.
Table 14
shows the outputs for RY/BY#.
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm
is in progress or complete, or whether the device has entered the Erase Suspend
mode. Toggle Bit I may be read at any address, and is valid after the rising edge
of the final WE# pulse in the command sequence (prior to the program or erase
operation), and during the sector erase time-out.
Notes:
1.
VA = Valid address for programming. During a sector erase operation, a valid address is
any sector address within the sector being erased. During chip erase, a valid address is
any non-protected sector address.
DQ7 should be rechecked even if DQ5 = “1” because DQ7 may change simultaneously
with DQ5.
Figure 6. Data# Polling Algorithm
2.
DQ7 = Data
Yes
No
No
DQ5 = 1
No
Yes
Yes
FAIL
PASS
Read DQ7–DQ0
Addr = VA
Read DQ7–DQ0
Addr = VA
DQ7 = Data
START
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