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參數(shù)資料
| 型號： | S29NS032JPLBJW000 |
| 廠商： | Spansion Inc. |
| 英文描述： | 110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories |
| 中文描述： | 110納米CMOS 1.8伏只有同時讀/寫，突發(fā)模式閃存 |
| 文件頁數(shù)： | 49/85頁 |
| 文件大?。?/td> | 799K |
| 代理商： | S29NS032JPLBJW000 |
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March 22, 2006 S29NS-J_00_A10
S29NS-J
45
D a t a S h e e t
Write Operation Status
The device provides several bits to determine the status of a program or erase operation: DQ2,
DQ3, DQ5, DQ6, and DQ7.
Table 20
and the following subsections describe the function of these
bits. DQ7 and DQ6 each offers a method for determining whether a program or erase operation
is complete or in progress.
DQ7: Data# Polling
The Data# Polling bit, DQ7, indicates to the host system whether an Embedded Program or Erase
algorithm is in progress or completed, or whether a bank is in Erase Suspend. Data# Polling is
valid after the rising edge of the final WE# pulse in the command sequence.
During the Embedded Program algorithm, the device outputs on DQ7 the complement of the
datum programmed to DQ7. This DQ7 status also applies to programming during Erase Suspend.
When the Embedded Program algorithm is complete, the device outputs the datum programmed
to DQ7. The system must provide the program address to read valid status information on DQ7.
If a program address falls within a protected sector, Data# Polling on DQ7 is active for approxi-
mately t
PSP
, then that bank returns to the read mode.
During the Embedded Erase algorithm, Data# Polling produces a “0” on DQ7. When the Embed-
ded Erase algorithm is complete, or if the bank enters the Erase Suspend mode, Data# Polling
produces a “1” on DQ7. The system must provide an address within any of the sectors selected
for erasure to read valid status information on DQ7.
After an erase command sequence is written, if all sectors selected for erasing are protected,
Data# Polling on DQ7 is active for approximately t
ASP
(all sectors protected toggle time), then the
bank returns to the read mode. If not all selected sectors are protected, the Embedded Erase al-
gorithm erases the unprotected sectors, and ignores the selected sectors that are protected.
However, if the system reads DQ7 at an address within a protected sector, the status may not be
valid.
Just prior to the completion of an Embedded Program or Erase operation, DQ7 may change asyn-
chronously with DQ6–DQ0 while Output Enable (OE#) is asserted low. That is, the device may
change from providing status information to valid data on DQ7. Depending on when the system
samples the DQ7 output, it may read the status or valid data. Even if the device has completed
the program or erase operation and DQ7 has valid data, the data outputs on DQ6–DQ0 may be
still invalid. Valid data on DQ7–DQ0 will appear on successive read cycles.
Table 20
shows the outputs for Data# Polling on DQ7. 3 shows the Data# Polling algorithm. 18
in the
AC Characteristics
section shows the Data# Polling timing diagram.
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相關(guān)代理商/技術(shù)參數(shù) |
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| S29NS032JPLBJW002 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories |
| S29NS032JPLBJW003 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories |
| S29NS064J0LBAW00 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories |
| S29NS064J0LBAW000 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Burst Mode Flash Memories |
| S29NS064J0LBAW002 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Burst Mode Flash Memories |
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