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參數(shù)資料
| 型號： | S29NS032JPLBJW000 |
| 廠商： | Spansion Inc. |
| 英文描述： | 110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories |
| 中文描述： | 110納米CMOS 1.8伏只有同時讀/寫，突發(fā)模式閃存 |
| 文件頁數(shù)： | 40/85頁 |
| 文件大小： | 799K |
| 代理商： | S29NS032JPLBJW000 |
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36
S29NS-J
S29NS-J_00_A10 March 22, 2006
D a t a S h e e t
Autoselect Command Sequence
The autoselect command sequence allows the host system to access the manufacturer and device
codes, and determine whether or not a sector is protected.
Table 18
shows the address and data
requirements. The autoselect command sequence may be written to an address within a bank
that is either in the read or erase-suspend-read mode. The autoselect command may not be writ-
ten while the device is actively programming or erasing in the other bank.
The autoselect command sequence is initiated by first writing two unlock cycles. This is followed
by a third write cycle that contains the bank address and the autoselect command. The bank then
enters the autoselect mode. The system may read at any address within the same bank any num-
ber of times without initiating another autoselect command sequence. The following table
describes the address requirements for the various autoselect functions, and the resulting data.
BA represents the bank address, and SA represent the sector address. The device ID is read in
three cycles.
Table 13. Autoselect Device ID
The system must write the reset command to return to the read mode (or erase-suspend-read
mode if the bank was previously in Erase Suspend).
Program Command Sequence
Programming is a four-bus-cycle operation. The program command sequence is initiated by writ-
ing two unlock write cycles, followed by the program set-up command. The program address and
data are written next, which in turn initiate the Embedded Program algorithm. The system is
not
required to provide further controls or timings. The device automatically provides internally gen-
erated program pulses and verifies the programmed cell margin.
Table 18
shows the address and
data requirements for the program command sequence.
When the Embedded Program algorithm is complete, that bank then returns to the read mode
and addresses are no longer latched. The system can determine the status of the program oper-
ation by monitoring DQ7 or DQ6/DQ2. Refer to the
Write Operation Status
section for information
on these status bits.
Any commands written to the device during the Embedded Program Algorithm are ignored.
Note
that a
hardw are reset
immediately terminates the program operation. The program command
sequence should be reinitiated once that bank has returned to the read mode, to ensure data
integrity.
Description
Address
Read Data
S29NS128J
S29NS064J
S29NS032J
S29NS016J
Manufacturer ID
(BA) + 00h
0001h
Device ID,
Word 1
(BA) + 01h
007Eh
277Eh
2A7Eh
297Eh
Device ID,
Word 2
(BA) + 0Eh
0016h
2702h
2A24h
2915h
Device ID,
Word 3
(BA) + 0Fh
0000h
2700h
2A00h
2900h
Sector Block
Lock/Unlock
(SA) + 02h
0001h (locked),
0000h (unlocked)
Revision ID
(BA) + 03h
TBD, Based on Nokia spec
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相關(guān)代理商/技術(shù)參數(shù) |
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| S29NS032JPLBJW002 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories |
| S29NS032JPLBJW003 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories |
| S29NS064J0LBAW00 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories |
| S29NS064J0LBAW000 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Burst Mode Flash Memories |
| S29NS064J0LBAW002 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Burst Mode Flash Memories |
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