參數(shù)資料
型號： S1C88816D
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, UUC164
封裝： DIE-164
文件頁數(shù)： 31/173頁
文件大?。?/td> 1411K
代理商： S1C88816D
118
EPSON
S1C88816 TECHNICAL MANUAL
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (SVD Circuit)
5.14 Supply Voltage Detection
(SVD) Circuit
5.14.1 Configuration of SVD circuit
The S1C88816 has a built-in supply voltage detec-
tion (SVD) circuit configured with a 4-bit successive
approximation A/D converter.
The SVD circuit has 16 sampling levels (level 0–
level 15) for supply voltage, and this can be control-
led by software.
In addition, an initial reset signal can be generated
when the supply voltage drops to level 0 or less.
This is selected by the mask option.
Figure 5.14.1.1 shows the configuration of the SVD
circuit.
5.14.2 Operation of SVD circuit
s Sampling control of the SVD circuit
The SVD circuit has two operation modes: continu-
ous sampling and 1/4 Hz auto-sampling mode.
Operation mode selection is done by the SVD control
registers SVDON and SVDSP as shown in Table
5.14.2.1. When both bits of SVDON and SVDSP are
set to "1", continuous sampling is selected.
Table 5.14.2.1 Correspondence between control register
and operation mode
In both operation modes, reading SVDON can
confirm whether the SVD circuit is operating
(BUSY) or on standby (READY); "1" indicates BUSY
and "0" indicates READY.
When executing an SLP instruction while the SVD
circuit is operating, the stop operation of the OSC1
oscillation circuit is kept waiting until the sampling
is completed. The two bits of SVDON and SVDSP
are automatically reset to "0" by hardware while
waiting for completion of sampling.
To reduce current consumption, turn the SVD
circuit OFF when it is not necessary.
s Detection result
The SVD circuit A/D converts the supply voltage
(VDD–VSS) by 4-bit resolution and sets the result
thereof into the SVD0–SVD3 register.
The data in SVD0–SVD3 correspond to the detec-
tion levels as shown in Table 5.14.2.2 and the
detection data is maintained until the next sam-
pling.
For the correspondence between the detection level
and the supply voltage, see "7 ELECTRICAL
CHARACTERISTICS".
An interval of 7.8 msec (fOSC1 = 32.768 kHz) is
required from the start of supply voltage sampling
by the SVD circuit to completion by writing the
result into SVD0–SVD3. Therefore, when reading
SVD0–SVD3 before sampling is finished, the
previous result will be read.
Fig. 5.14.1.1 Configuration of SVD circuit
VDD
Data
bus
SVD3
SVD2
SVD1
SVD0
2,048 Hz
Sampling
control
circuit
SVDON
SVDSP
Mask option
fOSC1 Dividing
circuit
OSC1
oscillation
circuit
Reference voltage
generation circuit
Internal initial reset
Other reset factor
Initial
reset
circuit
1/4 Hz
4-bit A/D
converter
SVDON
0
1
Operating mode
SVD circuit OFF
1/4 Hz auto-sampling ON
Continuous sampling ON
SVDSP
0
1
×
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S1C88848 制造商:EPSON 制造商全稱:EPSON 功能描述:8-bit Single Chip Microcomputer
S1C8F360D411000 功能描述:16位微控制器 - MCU 8-bit Flash 60KB LCD Dr. 51 x 32 RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
S1C8F360D511000 功能描述:16位微控制器 - MCU 8-bit Flash 60KB LCD Dr. 51 x 32 RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
S1C8F360F413100 功能描述:16位微控制器 - MCU 8-bit Flash 60KB LCD Dr. 51 x 32 RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
S1C8F360F513200 功能描述:16位微控制器 - MCU 8-bit Flash 60KB LCD Dr. 51 x 32 RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
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