參數(shù)資料
型號(hào): S1C88816D
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, UUC164
封裝: DIE-164
文件頁數(shù): 27/173頁
文件大小: 1411K
代理商: S1C88816D
114
EPSON
S1C88816 TECHNICAL MANUAL
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Melody Generator)
During play, the melody play status bit MBUSY
goes "1" for both the play modes. It is reset to "0"
when a play stops completely and an interrupt
occurs at the same time.
A melody continues until the note being played
has finished even if MTC is set to "0". Use
MBUSY or an interrupt to check if play has
actually finished. Be especially sure when
rewriting the melody RAM after play has
finished.
s Sound generator output during playing
The melody output terminals MOUT and MOUT
can also be used to output the buzzer signal
generated by the sound generator. Use the output
selection register MOSEL for this purpose.
When "1" is written to MOSEL, the MOUT and
MOUT terminals are configured as the melody
output only ports. When "0" is written to MOSEL,
the MOUT and MOUT terminals output the buzzer
signal generated by the sound generator.
When the MOSEL is set to "0" during melody play,
the melody play sequence continues. If the buzzer
signal is not output from the sound generator while
MOSEL is "0", a silent signal is output.
MOSEL
MBUSY
BZON
MOUT/MOUT output
During playing
Stopped
A Melody output
B Sound generator output
ON
B
AA
Fig. 5.13.3.3 Buzzer priority output
5.13.4 Interrupt function
The melody generator can generate an interrupt
when play has finished.
Figure 5.13.4.1 shows the configuration of the
melody generator interrupt circuit.
The melody generator sets the interrupt factor flag
FMDY to "1" when a melody output stops
completely.
At this time, if the interrupt enable register EMDY
is "1" and the interrupt priority register PMDY (2
bits) is set to a higher level than the setting of the
interrupt flags (I0 and I1), an interrupt is generated
to the CPU.
By setting the EMDY register to "0", the interrupt to
the CPU can also be disabled. However, the
interrupt factor flag is set to "1" when play has
finished regardless of the interrupt enable register
and interrupt priority register settings.
The interrupt factor flag set in "1" is reset to "0" by
writing "1".
Refer to Section 5.16, "Interrupt and Standby
Status", for details of the interrupt control registers
and operations subsequent to interrupt generation.
The exception processing vector address for the
melody play completion interrupt has been set in
000026H.
Fig. 5.13.4.1 Configuration of melody generator interrupt circuit
Data
bus
Interrupt
request
Address
Melody play
completion
Interrupt factor flag
FMDY
Address
Interrupt enable
register EMDY
Interrupt priority
level judgment
circuit
Address
Interrupt priority register
PMDY0, PMDY1
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