參數(shù)資料
型號： S1C88816D
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, UUC164
封裝： DIE-164
文件頁數(shù)： 121/173頁
文件大?。?/td> 1411K
代理商： S1C88816D
S1C88816 TECHNICAL MANUAL
EPSON
43
5 PERIPHERAL CIRCUITS AND THEIR OPERATIO (Output Ports)
s High impedance control
HZR26: 00FF71HD6
HZR27: 00FF71HD7
HZR34: 00FF72HD4
HZR50: 00FF70HD6
HZR51: 00FF70HD7
Sets the output terminals to a high impedance state.
When "1" is written: High impedance
When "0" is written: Complementary
Reading:
Valid
HZRxx is the high impedance control register
which correspond to the Rxx output port terminal.
When "1" is set to the HZRxx register, the corre-
sponding output port terminal becomes high
impedance state and when "0" is set, it becomes
complementary output.
This control is effective even if the port is set as a
special output port.
At initial reset, this register is set to "0"
(complimentary).
s DC output control
R26D: 00FF75HD6
R27D: 00FF75HD7
R34D: 00FF76HD4
R50D: 00FF78HD0
R51D: 00FF78HD1
Sets the data output from the output port terminal
Rxx.
When "1" is written: HIGH level output
When "0" is written: LOW level output
Reading:
Valid
RxxD is the data register for the Rxx output port.
When "1" is set to the register, the corresponding
output port terminal goes HIGH (VDD), and when
"0" is set, it goes LOW (VSS).
At initial reset, R50D is set to "0" (LOW level
output). The other registers are set to "1" (HIGH
level output).
When R26 and/or R51 are set to the special outputs
by mask option, R26D and/or R51D can be used as
general-purpose registers that do not affect the
output status.
s Special output control
PTOUT: 00FF30HD2
Controls the TOUT (programmable timer output
clock) output and TOUT (TOUT inverted signal)
output.
When "1" is written: TOUT/TOUT output
When "0" is written: HIGH (DC) output [R27]
LOW (DC) output [R26]
Reading:
Valid
PTOUT is the output control register for TOUT and
TOUT signals. When "1" is set to the register, the
TOUT (TOUT) signal is output from the output
port terminal R27 (R26). When "0" is set, the R27
goes HIGH (VDD) and the R26 goes LOW (VSS).
To output the TOUT signal, "1" must always be set
for the data register R27D. The data register R26D
does not affect the TOUT output.
The TOUT signal can be output from R26 only
when the function is selected by mask option.
At initial reset, PTOUT is set to "0" (DC output).
FOUTON: 00FF40HD3
Controls the FOUT (fOSC1/fOSC3 dividing clock)
signal output.
When "1" is written: FOUT signal output
When "0" is written: HIGH level (DC) output
Reading:
Valid
FOUTON is the output control register for FOUT
signal. When "1" is set, the FOUT signal is output
from the output port terminal R34 and when "0" is
set, HIGH (VDD) level is output. At this time, "1"
must always be set for the data register R34D.
At initial reset, FOUTON is set to "0" (HIGH level
output).
FOUT0, FOUT1, FOUT2: 00FF40HD4, D5, D6
FOUT signal frequency is set as shown in Table
5.5.6.2.
Table 5.5.6.2 FOUT frequency settings
At initial reset, this register is set to "0" (fOSC1/1).
FOUT2
FOUT frequency
0
1
fOSC1 / 1
fOSC1 / 2
fOSC1 / 4
fOSC1 / 8
fOSC3 / 1
fOSC3 / 2
fOSC3 / 4
fOSC3 / 8
FOUT1
0
1
0
1
FOUT0
0
1
0
1
0
1
0
1
fOSC1:
fOSC3:
OSC1 oscillation frequency
OSC3 oscillation frequency
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