參數(shù)資料
型號: S1C88816D
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, UUC164
封裝: DIE-164
文件頁數(shù): 160/173頁
文件大小: 1411K
代理商: S1C88816D
S1C88816 TECHNICAL MANUAL
EPSON
79
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Programmable Timer)
s 8/16-bit mode setting
By writing "0" to the 8/16-bit mode selection
register MODE16, timer 0 and timer 1 are set as
independent timers in 8-bit
× 2 channels. In this
mode, timer 0 and timer 1 can be controlled
individually and each of them operates independ-
ently.
On the other hand, when writing "1" to the register
MODE16, timer 0 and timer1 are set as 1 channel
16-bit timer. This is done by setting timer 0 to the
lower 8 bits, and timer 1 to the upper 8 bits. The
timer is controlled by timer 0's registers. In this
case, the control registers for timer 1 are invalid.
(PRUN1 is fixed at "0".)
From the time the OSC3 oscillation circuit is
turning ON until oscillation stabilizes, an
interval of several msec to several 10 msec is
necessary. Consequently, you should allow an
adequate waiting time after turning the OSC3
oscillation circuit ON before starting the count
of the programmable timer. (The oscillation
start time will vary somewhat depending on the
oscillator and on external parts. Refer to the
oscillation start time example indicated in
Chapter 7, "ELECTRICAL CHARACTERIS-
TICS".)
At initial reset, OSC3 oscillation circuit is set to
OFF status.
(2) Selection of prescaler dividing ratio
Select the dividing ratio of each prescaler from
among 4 types. This selection is done by the
prescaler dividing ratio selection registers
PSC00/PSC01 (timer 0) and PSC10/PSC11
(timer 1). Setting value and dividing ratio
correspondence are shown in Table 5.10.4.1.
Table 5.10.4.1 Selection of prescaler dividing ratio
Fig. 5.10.3.3 8/16-bit mode setting and counter configuration
5.10.4 Setting of input clock
Prescalers have been provided for timers 0 and 1.
The prescalers generate the input clock for each by
dividing the source clock signal from the OSC1 or
OSC3 oscillation circuit.
The source clock and the dividing ratio of the
prescaler can be selected individually for timer 0
and timer 1 in software.
The input clocks are set by the below sequence.
(1) Selection of source clock
Select the source clock (OSC1 or OSC3) for each
prescaler. This is done with the source clock
selection registers CKSEL0 (timer 0) and
CKSEL1 (timer 1): when "0" is written, OSC1 is
selected and when "1" is written, OSC3 is
selected. When the 16-bit mode is selected, the
source clock is selected by register CKSEL0, and
the register CKSEL1 setting becomes invalid.
When the OSC3 oscillation circuit is made the
clock source, it is necessary to turn the OSC3
oscillation ON, prior to using the programmable
timer.
By writing "1" to the register PRUN0 (timer 0)
and PRUN1 (timer 1), the source clock is input
to the prescaler. Therefore, the clock with
selected dividing ratio is input to the timer and
the timer starts counting down.
When the 16-bit mode has been selected, the
dividing ratio for the source clock is selected by
register PSC00/PSC01 and the setting of register
PSC10/PSC11 becomes invalid.
5.10.5 Timer mode
The timer mode counts down using the prescaler
output as an input clock. In this mode, the pro-
grammable timer operates as a timer that obtains
fixed cycles using the OSC1 or OSC3 oscillation
circuit as a clock source.
See "5.10.3 Count operation and basic mode setting"
for basic operation and control, and "5.10.4 Setting
input clock" for the clock source and setting of the
prescaler.
8-bit data
Timer 0
Timer 1
Timer 0
input
clock
Timer 1
input
clock
Low-order 8-bit data
High-order 8-bit data
Timer 0
Timer 1
Timer 0
input
clock
Timer 0
underflow
signal
Interrupt
request
[16-bit mode]
Interrupt
request
Interrupt
request
[8-bit mode]
PSC11
PSC01
PSC10
PSC00
Prescaler dividing ratio
1
0
1
0
1
0
Source clock / 64
Source clock / 16
Source clock / 4
Source clock / 1
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