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參數(shù)資料
| 型號(hào)： | PPXY8300A6T1 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | Pressure Sensor |
| 英文描述： | DIFFERENTIAL, PEIZORESISTIVE PRESSURE SENSOR, RECTANGULAR, SURFACE MOUNT |
| 封裝： | SOIC-20 |
| 文件頁數(shù)： | 17/162頁 |
| 文件大?。?/td> | 4316K |
| 代理商： | PPXY8300A6T1 |
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MPXY8300 Series
Sensors
Freescale Semiconductor
113
13.5.2
Carrier Frequency
The carrier frequency is established mainly by the external crystal used, but a centering of the fractional-n PLL provides more
precise control. If the CF control bit is clear the PLL will be configured for a carrier center frequency of the 315 MHz. If the CF
control bit is set the PLL will be configured for a carrier center frequency of the 434 MHz.
13.5.3
RF Power Output
The maximum power output from the RF pin can be adjusted to one of 24 levels using the PWR0:4 bits in the XMTCR.
13.5.4
Transmission Error
Any transmission will be aborted if one of the following occurs:
1.
The CTS signal does not become active within the tLOCK time.
2.
The PLL falls out of lock after once being set and the RTS signal is still active.
If either of these cases occurs the RF output will be turned off; the SEND control bit will be cleared; and the transmission error
status flag, RFEF, will be set. The RFEF bit is cleared when the SEND control bit is set again later.
13.6
Register Descriptions
13.6.1
RFX Control Register 0 - RFCR0
The RFCR0 register contains two control bits for the RFX as described in Figure 13-9. This register is accessed by writing to the
RFX register address $00 using the internal SPI.
$00
Bit 7
6
5
4
3
2
1
Bit 0
R
BPS
W
RESET:
0
1
0
1
Figure 13-9 RFX Control Register 0 (RFCR0)
Table 13-3 RFX Control Register 0 Field Descriptions
Field
Description
7-0
BPS[7:0]
Data Rate — The BPS0:7 control bits select the data rate for the transmitted datagrams as described by the fol-
lowing equation:
Where:
fDATA = Data rate in bits/second
fXTAL = External crystal frequency in MHz
D
=
Carrier selection (64 if CF bit zero, 88 if CF bit set)
n
=
Decimal value of binary weighted BPS bits
Examples of the value of n for common data rates are given in Table 13-4. The BPS bits are set to $19 by a RFX
reset which results in a default data rate of approximately 9600 bps.
f
DATA
1000000
f
XTAL
×
Dn
1
+
()
×
-----------------------------------------------
=
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