參數(shù)資料
型號: PowerPC 740
廠商: IBM Microeletronics
英文描述: 32-Bit Embedded Microprocessor(32位精簡指令集嵌入式微處理器)
中文描述: 32位嵌入式微處理器(32位精簡指令集嵌入式微處理器)
文件頁數(shù): 5/48頁
文件大小: 608K
代理商: POWERPC 740
12/8/99
Version 1.02
Page5
PowerPC 740 and PowerPC 750 Microprocessor
CMOS 0.20
μ
m Copper Technology, PID-8p, PPC740L and PPC750L, dd3.2
Overview
The 750 is targeted for high performance, low power systems and supports the following power management
features: doze, nap, sleep, and dynamic power management. The 750 consists of a processor core and an
internal L2 Tag combined with a dedicated L2 cache interface and a 60x bus. The L2 cache is not available
with the 740.
Figure 1 shows a block diagram of the 750.
Figure 1. 750 Block Diagram
FXU2
GPRs
LSU
FPU
Instruction Fetch
Branch Unit
System
Unit
Completion
Rename
Buffers
32K ICache
32K DCache
BHT /
BTIC
BIU
BIU
60X
L2 Cache
FXU1
L2 Tags
Dispatch
Control Unit
FPRs
Rename
Buffers
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