參數(shù)資料
型號： PIC16F785
廠商： Microchip Technology Inc.
英文描述： 20-Pin Flash-Based 8-Bit CMOS Microcontroller with Two-Phase Asychronous Feedback PWM, Dual High-Speed Comparators and Dual Operational Amplifiers
中文描述： 20引腳基于閃存的8兩相異步反饋的PWM，雙高位CMOS微控制器的高速比較器和雙運算放大器
文件頁數(shù)： 102/178頁
文件大小： 1620K
代理商： PIC16F785
PIC16F785
DS41249A-page 100
Preliminary
2004 Microchip Technology Inc.
14.1
EECON1 AND EECON2
REGISTERS
EECON1 is the control register with four low-order bits
physically implemented. The upper four bits are non-
implemented and read as ‘
0
’s.
Control bits RD and WR initiate read and write,
respectively. These bits cannot be cleared, only set in
software. They are cleared in hardware at completion
of the read or write operation. The inability to clear the
WR bit in software prevents the accidental, premature
termination of a write operation.
The WREN bit, when set, will allow a write operation.
On power-up, the WREN bit is clear. The WRERR bit is
set when a write operation is interrupted by a MCLR
Reset, or a WDT Time-out Reset during normal
operation. In these situations, following Reset, the user
can check the WRERR bit, clear it and rewrite the loca-
tion. The EEDAT and EEADR registers are cleared by
a reset. Therefore, the EEDAT and EEADR registers
will need to be re-initialized.
Interrupt flag EEIF bit (PIR1<7>) is set when write is
complete. This bit must be cleared in software.
EECON2 is not a physical register. Reading EECON2
will read all ‘
0
’s. The EECON2 register is used
exclusively in the data EEPROM write sequence.
REGISTER 14-3:
EECON1 — EEPROM CONTROL REGISTER (ADDRESS: 9Ch)
U-0
U-0
U-0
U-0
—
—
—
—
bit 7
Note:
The EECON1, EEDAT and EEADR
registers should not be modified during a
data EEPROM write (WR bit = ‘
1
’).
R/W-x
WRERR
R/W-0
WREN
R/S-0
WR
R/S-0
RD
bit 0
bit 7-4
bit 3
Unimplemented:
Read as ‘
0
’
WRERR:
EEPROM Error Flag bit
1
= A write operation is prematurely terminated (any MCLR Reset, any WDT Reset during
normal operation or BOR reset)
0
= The write operation completed
WREN:
EEPROM Write Enable bit
1
= Allows write cycles
0
= Inhibits write to the data EEPROM
WR:
Write Control bit
1
= Initiates a write cycle (The bit is cleared by hardware once write is complete. The WR bit
can only be set, not cleared, in software.)
0
= Write cycle to the data EEPROM is complete
RD:
Read Control bit
1
= Initiates an EEPROM read (Read takes one cycle. RD is cleared in hardware. The RD bit
can only be set, not cleared, in software.)
0
= Does not initiate an EEPROM read
bit 2
bit 1
bit 0
Legend:
S = Bit can only be set
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
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參數(shù)描述
PIC16F785-E/ML 功能描述:8位微控制器 -MCU 3.5 KB 128 RAM 18I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16F785-E/P 功能描述:8位微控制器 -MCU 14KB 368 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16F785-E/SO 功能描述:8位微控制器 -MCU 3.5KB FL 128R 18 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16F785-E/SS 功能描述:8位微控制器 -MCU 3.5KB FL 128R 18 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC16F785-I/ML 功能描述:8位微控制器 -MCU 3.5 KB 128 RAM 18I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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