參數(shù)資料
型號(hào)： PIC16CR7X
廠商： Microchip Technology Inc.
英文描述： 28/40-Pin, 8-Bit CMOS ROM Microcontrollers
中文描述： 28/40-Pin，8位微控制器的CMOS光盤
文件頁數(shù)： 90/172頁
文件大小： 1506K
代理商： PIC16CR7X
PIC16CR7X
DS21993C-page 88
2007 Microchip Technology Inc.
11.7
Use of the CCP Trigger
An A/D conversion can be started by the “special event
trigger” of the CCP2 module. This requires that the
CCP2M3:CCP2M0 bits (CCP2CON<3:0>) be pro-
grammed as
1011
and that the A/D module is enabled
(ADON bit is set). When the trigger occurs, the
GO/DONE bit will be set, starting the A/D conversion,
and the Timer1 counter will be reset to zero. Timer1 is
reset to automatically repeat the A/D acquisition period
with minimal software overhead (moving the ADRES to
the desired location). The appropriate analog input
channel must be selected and an appropriate acquisi-
tion time should pass before the “special event trigger”
sets the GO/DONE bit (starts a conversion).
If the A/D module is not enabled (ADON is cleared),
then the “special event trigger” will be ignored by the
A/D module, but will still reset the Timer1 counter.
TABLE 11-2:
SUMMARY OF A/D REGISTERS
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR,
BOR
Value on
all other
Resets
0Bh,8Bh,
10Bh, 18Bh
INTCON
GIE
PEIE
TMR0IE
INTE
RBIE
TMR0IF
INTF
RBIF
0000 000x 0000 000u
0Ch
0Dh
PIR1
PIR2
PSPIF
(1)
—
PSPIE
(1)
—
A/D Result Register Byte
ADIF
—
RCIF
—
TXIF
—
SSPIF
—
CCP1IF
—
TMR2IF TMR1IF
0000 0000 0000 0000
—
CCP2IF
---- ---0 ---- ---0
8Ch
8Dh
1Eh
PIE1
PIE2
ADRES
ADIE
—
RCIE
—
TXIE
—
SSPIE
—
CCP1IE
—
TMR2IE TMR1IE
0000 0000 0000 0000
—
CCP2IE
---- ---0 ---- ---0
xxxx xxxx uuuu uuuu
1Fh
9Fh
05h
85h
ADCON0
ADCON1
PORTA
TRISA
PORTE
(2)
TRISE
(2)
x
= unknown,
u
= unchanged, – = unimplemented, read as ‘
0
’. Shaded cells are not used for A/D conversion.
1:
Bits PSPIE and PSPIF are reserved on the PIC16CR73/76; always maintain these bits clear.
2:
These registers are reserved on the PIC16CR73/76.
ADCS1
—
—
—
ADCS0
—
—
—
CHS2
—
RA5
PORTA Data Direction Register
CHS1
—
RA4
CHS0 GO/DONE
—
RA3
—
ADON
PCFG0
---- -000 ---- -000
RA0
--0x 0000 --0u 0000
--11 1111 --11 1111
0000 00-0 0000 00-0
PCFG2
RA2
PCFG1
RA1
09h
—
—
—
—
—
RE2
RE1
RE0
---- -xxx ---- -uuu
89h
Legend:
Note
IBF
OBF
IBOV
PSPMODE
—
PORTE Data Direction Bits
0000 -111 0000 -111
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