參數(shù)資料
型號： PIC16CR7X
廠商： Microchip Technology Inc.
英文描述： 28/40-Pin, 8-Bit CMOS ROM Microcontrollers
中文描述： 28/40-Pin，8位微控制器的CMOS光盤
文件頁數(shù)： 63/172頁
文件大?。?/td> 1506K
代理商： PIC16CR7X
2007 Microchip Technology Inc.
DS21993C-page 61
PIC16CR7X
REGISTER 9-2:
SSPCON: SYNC SERIAL PORT CONTROL (ADDRESS 14h)
R/W-0
WCOL
R/W-0
SSPOV
R/W-0
SSPEN
R/W-0
CKP
R/W-0
SSPM3
R/W-0
SSPM2
R/W-0
SSPM1
R/W-0
SSPM0
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
WCOL
: Write Collision Detect bit
1
= The SSPBUF register is written while it is still transmitting the previous word
(must be cleared in software)
0
= No collision
SSPOV
: Receive Overflow Indicator bit
In SPI mode:
1
= A new byte is received while the SSPBUF register is still holding the previous data. In case
of overflow, the data in SSPSR is lost. Overflow can only occur in Slave mode. The user
must read the SSPBUF, even if only transmitting data, to avoid setting overflow. In
Master mode, the overflow bit is not set since each new reception (and transmission) is
initiated by writing to the SSPBUF register.
0
= No overflow
In I
2
C mode:
1
= A byte is received while the SSPBUF register is still holding the previous byte. SSPOV
is a “don’t care” in Transmit mode. SSPOV must be cleared in software in either mode.
0
= No overflow
SSPEN
: Synchronous Serial Port Enable bit
In SPI mode:
1
= Enables serial port and configures SCK, SDO and SDI as serial port pins
0
= Disables serial port and configures these pins as I/O port pins
In I
2
C mode:
1
= Enables the serial port and configures the SDA and SCL pins as serial port pins
0
= Disables serial port and configures these pins as I/O port pins
In both modes, when enabled, these pins must be properly configured as input or output.
CKP
: Clock Polarity Select bit
In SPI mode:
1
= Idle state for clock is a high level (Microwire default)
0
= Idle state for clock is a low level (Microwire alternate)
In I
2
C mode:
SCK release control
1
= Enable clock
0
= Holds clock low (clock stretch). (Used to ensure data setup time.)
SSPM3:SSPM0
: Synchronous Serial Port Mode Select bits
0000
= SPI Master mode, clock = F
OSC
/4
0001
= SPI Master mode, clock = F
OSC
/16
0010
= SPI Master mode, clock = F
OSC
/64
0011
= SPI Master mode, clock = TMR2 output/2
0100
= SPI Slave mode, clock = SCK pin. SS pin control enabled.
0101
= SPI Slave mode, clock = SCK pin. SS pin control disabled. SS can be used as I/O pin.
0110
= I
2
C Slave mode, 7-bit address
0111
= I
2
C Slave mode, 10-bit address
1011
= I
2
C Firmware Controlled Master mode (slave Idle)
1110
= I
2
C Slave mode, 7-bit address with Start and Stop bit interrupts enabled
1111
= I
2
C Slave mode, 10-bit address with Start and Stop bit interrupts enabled
bit 6
bit 5
bit 4
bit 3-0
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