參數(shù)資料
型號： PIC16CR7X
廠商： Microchip Technology Inc.
英文描述： 28/40-Pin, 8-Bit CMOS ROM Microcontrollers
中文描述： 28/40-Pin，8位微控制器的CMOS光盤
文件頁數(shù)： 88/172頁
文件大?。?/td> 1506K
代理商： PIC16CR7X
PIC16CR7X
DS21993C-page 86
2007 Microchip Technology Inc.
11.1
A/D Acquisition Requirements
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
HOLD
) must be allowed
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 11-2. The source
impedance (R
S
) and the internal sampling switch (R
SS
)
impedance directly affect the time required to charge
the capacitor C
HOLD
. The sampling switch (R
SS
)
impedance varies over the device voltage (V
DD
), see
Figure 11-2. The source impedance affects the offset
voltage at the analog input (due to pin leakage current).
The maximum recommended impedance for analog
sources is 10 k
Ω
. After the analog input channel is
selected (changed), the acquisition period must pass
before the conversion can be started.
To calculate the minimum acquisition time, T
ACQ
, see
the “
PIC
Mid-Range MCU Family Reference Manual
”
(DS33023). In general, however, given a maximum
source impedance of 10 k
Ω
and at a temperature of
100°C, T
ACQ
will be no more than 16
μ
sec.
FIGURE 11-2:
ANALOG INPUT MODEL
TABLE 11-1:
T
AD
vs. MAXIMUM DEVICE OPERATING FREQUENCIES (STANDARD DEVICES (C))
AD Clock Source (T
AD
)
Maximum Device Frequency
Operation
ADCS1:ADCS0
Max.
2T
OSC
8T
OSC
32T
OSC
RC
(1, 2, 3)
00
01
1.25 MHz
5 MHz
20 MHz
(Note 1)
10
11
Note 1:
The RC source has a typical T
AD
time of 4
μ
s but can vary between 2-6
μ
s.
2:
When the device frequencies are greater than 1 MHz, the RC A/D conversion clock source is only
recommended for Sleep operation.
3:
For extended voltage devices (LC), please refer to the Electrical Specifications section.
C
PIN
5 pF
VA
R
S
ANx
V
DD
V
T
= 0.6V
V
T
= 0.6V
I leakage
± 500 nA
R
IC
≤
1k
Sampling
Switch
SS
R
SS
C
= DAC Capacitance
= 51.2 pF
V
SS
6V
5V
4V
3V
2V
Sampling Switch
(k
Ω
)
5 6 7 8 9 10 11
V
DD
Legend:
C
PIN
V
T
I leakage
R
IC
SS
C
HOLD
= input capacitance
= threshold voltage
= leakage current at the pin due to
various junctions
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
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