參數(shù)資料
型號： PIC16CR7X
廠商： Microchip Technology Inc.
英文描述： 28/40-Pin, 8-Bit CMOS ROM Microcontrollers
中文描述： 28/40-Pin，8位微控制器的CMOS光盤
文件頁數(shù)： 64/172頁
文件大?。?/td> 1506K
代理商： PIC16CR7X
PIC16CR7X
DS21993C-page 62
2007 Microchip Technology Inc.
FIGURE 9-1:
SSP BLOCK DIAGRAM
(SPI MODE)
To enable the serial port, SSP enable bit, SSPEN
(SSPCON<5>) must be set. To reset or reconfigure SPI
mode, clear bit SSPEN, re-initialize the SSPCON
register, and then set bit SSPEN. This configures the
SDI, SDO, SCK and SS pins as serial port pins. For the
pins to behave as the serial port function, they must
have their data direction bits (in the TRISC register)
appropriately programmed. That is:
SDI must have TRISC<4> set
SDO must have TRISC<5> cleared
SCK (Master mode) must have TRISC<3>
cleared
SCK (Slave mode) must have TRISC<3> set
SS must have TRISA<5> set and ADCON must
be configured such that RA5 is a digital I/O
Read
Write
Internal
Data Bus
RC4/SDI/SDA
RC5/SDO
RA5/SS/AN4
RC3/SCK/
SCL
SSPSR Reg
SSPBUF Reg
SSPM3:SSPM0
bit 0
Shift
Clock
SS Control
Enable
Edge
Select
Clock Select
TMR2 Output
2
T
CY
Prescaler
4, 16, 64
TRISC<3>
Edge
Select
2
4
Peripheral OE
Note 1:
When the SPI is in Slave mode with SS
pin control enabled (SSPCON<3:0> =
0100
), the SPI module will reset if the SS
pin is set to V
DD
.
2:
If the SPI is used in Slave mode with
CKE = ‘
1
’, then the SS pin control must
be enabled.
3:
When the SPI is in Slave mode with SS
pin control enabled (SSPCON<3:0> =
‘
0100
’), the state of the SS pin can affect
the state read back from the TRISC<5>
bit. The Peripheral OE signal from the
SSP module into PORTC controls the
state that is read back from the
TRISC<5> bit (see
Section 4.3 “PORTC
and the TRISC Register”
for information
on
PORTC).
instructions, such as
BSF
are performed
on the TRISC register while the SS pin is
high, this will cause the TRISC<5> bit to
be set, thus disabling the SDO output.
If
Read-Modify-Write
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