參數(shù)資料
型號(hào)： pentium pro processor
廠商： Intel Corp.
英文描述： Pentium Pro Processor with 1MB L2 Cache at 200MHZ(1兆比特L2高速緩存頻率200兆赫茲處理器)
中文描述： 奔騰Pro處理器在200MHz（1兆比特二級(jí)高速緩存頻率200兆赫茲處理器帶有1MB的L2緩存）
文件頁(yè)數(shù)： 8/39頁(yè)
文件大?。?/td> 930K
代理商： PENTIUM PRO PROCESSOR
AP-523
E
8
that this tolerance specification covers all voltage
anomalies, including power supply ripple, power supply
tolerance, current transient response, and noise. Failure to
meet this specification on the low end will result in
transistors slowing down and not meeting timing
specifications. Not meeting the specification on the high
end can induce
electro-migration,
causing damage or
reducing the life of the processor.
3.2.
Multiple Voltages
L2 Cache
CPU
Figure 5. Multiple Voltage Die
While the Pentium Pro processor with a 256-Kbyte L2
cache runs at 3.1V ( ), it consists of two separate die. The
processor core and the 256-Kbyte L2 cache die are each
designed for 3.1V, but future cache die may be designed
to run at 3.3V. Also, future Pentium Pro processor
components will run at a different voltage than 3.1V.
Figure 5 shows a Pentium Pro processor package with
the two types of voltage combinations shown beneath it.
The Pentium Pro processor definition specifies that
every
L2 will run on either the same supply voltage as the
processor core (which may change in the future) or at
3.3V. See the flexible motherboard guidelines in the
Pentium
a
Pro Processor Developer’s Manual, Volume 1
for details.
The Pentium Pro processor package is designed to
support future cache die by adding separate 3.3V
cache
support
pins to the package. These pins are called V
CC
S
pins, while the primary voltage is supplied on the V
CC
P
pins. See Figure 6 for the location of these pins. For a
system to operate seamlessly with a Pentium Pro
processor with a 512-Kbyte L2 cache, the V
CC
S pins
simply need to be connected to a well decoupled 3.3V
supply. The cache die of each component is bonded
internally to receive power either from the cache support
pins, or from the main power source as required by the
device. Future cache die on V
CC
S are not expected to
exceed a maximum average current (over many cycles)
of 2.4A. Note that in components in which the L2 is
receiving current from the V
CC
S pins, the V
CC
P current
will be decreased. The maximum power of a Pentium Pro
processor is specified as the sum of the maximum power
of each die, not by the maximum current specification of
each voltage source.
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