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| 型號： | pentium pro processor |
| 廠商： | Intel Corp. |
| 英文描述： | Pentium Pro Processor with 1MB L2 Cache at 200MHZ(1兆比特L2高速緩存頻率200兆赫茲處理器) |
| 中文描述： | 奔騰Pro處理器在200MHz（1兆比特二級高速緩存頻率200兆赫茲處理器帶有1MB的L2緩存） |
| 文件頁數(shù)： | 27/39頁 |
| 文件大小： | 930K |
| 代理商： | PENTIUM PRO PROCESSOR |
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E
7.2.1.
AP-523
27
THE MAIN POWER SUPPLY
The main supply must be able to provide power to the
DC-to-DC converter as well as to the rest of the system.
One should ensure that the input voltage to the converter
meets the converter’s requirements, and that the DC-to-
DC converter does not create a transient problem of its
own on the 5V or 12V outputs of the main supply. The
guidelines that were given to the DC-to-DC converter
industry are described in Section 10.2, and should be
checked against the supply that is planned for the system.
For example, the current slew rate capability of the
power supply voltage to the regulator may be 0.2
Amp/
m
s with 10,000
m
F of load.
7.3.
V
TT
Intel recommends supplying V
TT
to each end of the
GTL+ bus using a separate linear regulator for each end.
Since the losses in a linear regulator are directly
proportional to V
IN
-V
OUT
, the 3.3V power supply makes
a good choice for the input voltage to the regulator. The
CPU voltage may seem like a better choice if it is lower
than 3.3V, but it will be varying from one Pentium Pro
processor variant to the next. This may cause a design
change for each generation of Pentium Pro processor.
Also, Linear regulators require a minimum voltage drop
in order to operate which may become an issue as the
Pentium Pro processor voltage decreases.
By using separate linear regulators, the voltage
distribution is contained to a very local region. In a bus
layout where both ends of the bus are physically near
each other, one regulator can be used to supply both sets
of termination resistors. In this situation, a 50 mil trace
(The wider the better) should be sufficient for
distributing the power to the termination resistors.
Linear regulators are fairly common and produced by
many vendors. See your local field applications engineer
for assistance locating a vendor.
Bulk capacitance for the regulator will be determined
from the reaction time specifications of the regulator
chosen. The capacitance must be enough to hold-over the
regulator during a switch from 0 to 5.4 Amps, as
estimated in Table 4, until the regulator reacts. In
addition, ten 1.0
m
F capacitors are recommended for high
frequency decoupling on each end of the Pentium Pro
processor bus. These should be distributed as near to the
termination resistors as possible.
7.3.1.
TERMINATION RESISTORS
Discrete resistors may be employed, however the
assembly time associated with placing about 280
resistors should be taken into account. A lower part count
implementation uses resistor networks.
NOTE
When using resistor networks with single corner
pin VCC connections for GTL+ termination,
beware of inductive packages. Intel has found
that these packages can cause significant voltage
drops due to the inductance in the 24 pin SOIC
packages being used for this purpose. A better
option is to use resistor networks in which both
ends of each resistor are available as pins.
7.4.
V
REF
Intel recommends one voltage divider at each
component, or at a minimum, one voltage divider at each
regulator. One per component means that V
REF
won’t
need to be distributed.
The rest of this discussion addresses how to design for
one voltage divider at each regulator, since the same
resistor values can be used when there is one voltage
divider per component. Note that all V
REF
inputs of one
component should be tied together, and can be counted
as one load. Each load is specified at a maximum of 15
m
Amps of leakage current which makes four loads (For
one voltage divider supplying 4 loads of an 8 load
system) a maximum of 60
m
Amps per voltage divider.
Note that these leakage currents can be positive or
negative.
Using 1% resistors for the voltage divider in Figure 24,
make R
1
a 150
W
resistor, and use 75
W
for R
2
. This will
create a static usage of 7 mA (1.5V/225
W
) per voltage
divider. After looking at all combinations of R
1
and R
2
(above and below tolerance) and I
REF
(
±
60
m
A), the worst
case solution for Equation 14 can be found with I
REF
at
60
m
Amps, R
1
at the low end of its tolerance specification
(148.5
W
), and R
2
at the high end of its tolerance
specification (75.75
W
). This yields:
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