E
1.0.
AP-523
5
INTRODUCTION
As computer performance demands increase, new,
higher speed logic with increased density is developed
to fulfill these needs. To reduce their overall power
dissipation, modern microprocessors are being designed
with lower voltage implementations. This in turn
requires power supplies to provide lower voltages with
higher current capability. Because of this, processor
power is now becoming a significant portion of the
system design, and demands special attention. Power
distribution requires careful design practices now more
than ever. The Pentium
Pro processor has unique
requirements for the voltages supplied to it, as well as a
new bus implementation, called GTL+, which requires a
voltage supply of its own.
For most personal computer designs, a power plane
with a mix of high frequency and bulk decoupling
capacitors spread evenly across the system board is a
low cost way to ensure sufficient power distribution. As
the current differences between the low power state and
the high power state increase, the cost of the power
distribution system becomes significant enough to merit
careful calculation. Centralized distribution of power,
for example, may no longer be the most cost effective
solution to power distribution.
Another side effect of lowering voltages of some
components is the existence of multiple voltages within
the system. On a basic Pentium Pro processor-based
system board there will be 1.5V for GTL+ termination,
2.5V-3.5V for the processor, 3.3V for the chipset and
the L2 cache, and 5V for other components. The
possibility that any of these voltages may come up
before another must be taken into account. This is
discussed in Section 3.3.
The reader should be familiar with basic electrical
engineering theory, as the first sections of this
document will explain in detail the issues involved in
designing a system with proper power distribution. The
last sections will offer specific solutions for a system
containing any number of Pentium Pro processors. This
includes a specification for a DC-to-DC converter
module.
1.1.
Terminology
“
Power-Good” or “PWRGOOD” is an active high
signal in the system which indicates that all of the
supplies and clocks within the system have become
stable. PWRGOOD should go active some constant
time after 5V, 3.3V and V
CC
P are stable and should go
inactive any time any of these voltages fail their
specifications. The time constant should be set such
that, in a working system, all clocks and other supply
levels have reached a stable condition before
PWRGOOD goes active.
“V
CC
P” is the processor core’s V
CC
. “V
CC
S” is always
3.3V.
“GTL+” is the technology used for the bus between the
Pentium Pro processor and its chipset. The GTL+ bus
and the processor bus are therefore synonymous.
1.2.
References
The
Pentium
Pro Processor Developer’s Manual,
Volume 1: Specifications
(Order Number 242690) is
referenced throughout this document.
2.0.
TYPICAL POWER
DISTRIBUTION
+
-
CPU
Figure 1. Ideal CPU Power Supply Scheme
Power distribution is generally thought of as
getting
power to the parts that need it
. Most digital designers
typically begin by assuming that an ideal supply will be
provided, and plan their schematics with little thought
to power distribution until the end. The printed circuit
board designers attempt to create the ideal supply with
two power planes in the PCB or by using large width
traces to distribute power. High frequency noise created
when logic gates switch is controlled with high
frequency ceramic capacitors, which are in turn
recharged from bulk capacitors (such as tantalum
capacitors). Various
rule of thumb
methods exist for
determining the amount of each type of capacitance that
is required. For Pentium Pro processor designs the
system designer will need to reach beyond the rule of
thumb and architect the power distribution system with
the specifications of the Pentium Pro processor in mind.