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| 型號(hào)： | pentium pro processor |
| 廠商： | Intel Corp. |
| 英文描述： | Pentium Pro Processor with 1MB L2 Cache at 200MHZ(1兆比特L2高速緩存頻率200兆赫茲處理器) |
| 中文描述： | 奔騰Pro處理器在200MHz（1兆比特二級(jí)高速緩存頻率200兆赫茲處理器帶有1MB的L2緩存） |
| 文件頁數(shù)： | 17/39頁 |
| 文件大小： | 930K |
| 代理商： | PENTIUM PRO PROCESSOR |
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E
AP-523
17
Table 3. Efficiency of a Linear Regulator
Efficiency with V
IN
of 5V
V
OUT
Power loss at 9.9 Amps
3.3
66%
16.8W
3.1
62%
18.8W
2.5
50%
24.8W
The efficiency of a linear regulator can be approximated
by the formula efficiency = V
OUT
/V
IN
. The power loss
and efficiency are shown in the Table 3 where V
IN
has
been left at 5V and the current delivered has been fixed
at 9.9 Amps. The power loss is fairly significant for a
linear regulator.
Although linear regulators tend to have faster reaction
times than switching regulators, the power loss in a linear
regulator is high enough that the use of a switching
regulator should be considered at these higher output
current ratings. An 80% efficiency can be achieved using
a 3.1V switching regulator at 9.9 Amps.
A switching regulator first
chops
the input voltage to
make it
AC-like
. The faster it switches or chops, the faster
the reaction time of the converter can be. The faster the
reaction time, the less capacitance will be required to
support it. Low end switching regulators operate at a 100
kHz switching rate, while high end devices start at 1
MHz.
4.3.
Decoupling Technologies and
Transient Response
As shown earlier, inductance is also an issue in
distribution of power. The inductance of the system due
to cables and power planes further slows the power
supply's ability to respond quickly to a current transient.
Package
+
-
DC-to-DC
Converter
C
PKG
C
HF
C
BULK
L
BOND
L
PIN
L
BOARD
C
DIE
Die
Figure 14. Location of Capacitance in a Power Model with a DC-to-DC Converter
Decoupling a power plane can be broken into several
independent parts. Figure 14 shows each of the locations
where capacitance could theoretically be applied. The
closer to the load the capacitor is placed, the more
inductance that is bypassed. By bypassing the inductance
of leads, power planes etc., less capacitance is required.
However, closer to the load there is less room for
capacitance. Therefore tradeoffs must be made.
Typically a digital component will cause switching
transients. These are the sharp surges of current that
occur at each clock edge and taper off by the end of the
cycle as shown in Figure 4. The Pentium Pro processor
has been designed such that it manages the highest
frequency components of the current transients. This has
been accomplished by adding capacitance to the package
(C
PKG
) as well as directly on the die (C
DIE
). To lower
bond wire and pin inductance (L
BOND
and L
PIN
) as well
as the board inductance (L
BOARD
), the Pentium Pro
processor is designed with approximately 70 ground pins
and 45 power pins. (The larger number of ground pins
than power pins is to account for the current
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