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| 型號： | pentium pro processor |
| 廠商： | Intel Corp. |
| 英文描述： | Pentium Pro Processor with 1MB L2 Cache at 200MHZ(1兆比特L2高速緩存頻率200兆赫茲處理器) |
| 中文描述： | 奔騰Pro處理器在200MHz（1兆比特二級高速緩存頻率200兆赫茲處理器帶有1MB的L2緩存） |
| 文件頁數(shù)： | 14/39頁 |
| 文件大?。?/td> | 930K |
| 代理商： | PENTIUM PRO PROCESSOR |
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AP-523
E
14
3.3.6.1.
Mixed Frequency Processors
In order to support different frequency multipliers to
each processor, the design will require four multiplexers.
Before
implementing
this
understand how useful this will be to the operating
systems running on the system.
strategy,
one
should
3.3.6.2.
FRC Mode
For FRC mode processors, one multiplexer will be
needed per FRC pair, but the multiplexer will need to be
able to be clocked using BCLK and meet setup and hold
times to the processors. This may require the use of high
speed programmable logic.
4.0.
MEETING THE PENTIUM
PRO
PROCESSOR POWER
REQUIREMENTS
To solve the needs of the Pentium Pro processor, one
must merely be aware of the issues described above and
design the system appropriately. This involves making
many tradeoffs between power supply, distribution and
decoupling technologies. This section discusses how to
design a system using the more accurate power
distribution model shown in Figure 3, one step at a time.
4.1.
Voltage Budgeting
Before beginning the design of a power distribution
system one must have an idea of how the tolerance
specification will be budgeted to each of the components
involved. This will provide a target for each component
and helps reduce iterations to reach a solution. The
Pentium Pro processor requires that the system meet a
5% tolerance specification. This is equivalent to 155 mV
above and below the nominal 3.1V. Do not include
voltage drops of the Pentium Pro processor socket, pins
etc. since these are taken into account beyond the 5%
tolerance specification. This is the budget the system
designer has to work with which leaves the model in
Figure 12 to work with at the Pentium Pro processor
socket pins.
The components that should be included in a voltage
budget are shown in Table 2 along with example values
for each. There are two budgets shown since different
components are more prevalant at different times.
Inductive effects are significant early in a current
transition while di/dt is high and are shown in the high
frequency (HF) budget. Capacitive effects are more
important once the HF capacitors have released their
charge and are shown in the low frequency (LF) budget.
Board resistance losses must always be included, while
ESR losses only need to be included for capacitors while
they are delivering current. Capacitor ESR is shown as a
loss in both budgets.
This may make a good starting point for any system
budget, but will be adjusted to suit that system’s needs.
Each component is discussed in the following sections.
Table 2 assumes that voltage drops break down over time
in a discrete manner. Ultimately the power distribution
should be simulated by the designer which will allow the
budget to be loosened.
Table 2. A Sample Voltage Budget
HF Budget in mV
Component
LF Budget in mV
Tolerance Specification
155
155
Regulator Set Point Tolerance
-25
-25
Inductive losses in HF Capacitors
-60
0
HF Capacitance ESR
-30
0
Bulk Capacitance ESR/ Capactance Sag
0
-60
Inductive Losses in Board
-10
0
Resistive Losses in Board
-10
-10
Ripple, Noise
-10
-10
Margin
10
50
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