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AP-523
21
This is a fairly conservative analysis. Using a reaction
time for a power source assumes that the power source
does not compensate at all for the change in current
demand until
D
t has passed, and then immediately is
capable of delivering to that demand. Also, it is
unnecessarily conservative to assume that the IR drop is
the full drop the whole period in which the capacitor
discharges as the current drops as the capacitor
discharges. To analyze the power distribution system in
more detail requires running a simulation from the power
source model to the Pentium Pro processor power model,
including all board, cable, and capacitor effects. See
Section 7.5 for more information on component models
and Section 11 for the Pentium Pro processor power
model.
4.3.2.
HIGH FREQUENCY DECOUPLING
Since the bulk storage not only contains an effective
series resistance, but also a fairly high inductance, these
capacitors need to be assisted by other capacitors that
have a lower inductance (but typically less capacitance).
These
high frequency
capacitors will control the
switching transients and hold-over the power planes
during an average load change until the higher
inductance capacitors can react.
The 1206 surface mount package is a fairly low
inductance package, and is actually lower than the
inductance of an 0603 package due to the geometry of
the board interconnects. For even lower inductance one
can use a 0612 package since the board interconnect area
gets even larger. An 0612 is the same size as the 1206
but has its pads along the long edge. The cost of these is
significantly higher however due to the complexity of
mass producing them. The 1206 package capacitors on
the other hand are readily available and low cost.
One difficulty in simulating with high frequency
capacitors however, is that vendors do not readily offer a
specification for the inductance of their parts. In Section
7.5 are some measured values from capacitors that Intel
has investigated which should be verified against the
vendors’ parts that will actually be used in any design.
After calculating the number of capacitors required, one
can look at the impact that averaging tolerances over
many measured components has to the design and pad
the design appropriately with additional components.
Since the capacitor inductance is package related, choose
the largest value available in the package that has been
chosen. The highest capacitance obtainable will be the
most beneficial for the design since the amount of
capacitance behind this inductance is still critical.
This simple law of inductance is useful for estimating the
number of high frequency capacitors required:
Equation 6. Simple Law of Inductance
V
Ldi dt
=
V
is the voltage drop that will be seen due to the
inductance. A
di/dt
value of 0.3A/ns can be used to
estimate the Pentium Pro processor and
L
is the
inductance of a series combination of via, trace, and all
of the high frequency capacitors in parallel. See Section
4.4 for ideas on reducing via and trace inductance.
Once the allowable inductance for the budgeted voltage
drop (due to high frequency transitions) is calculated, the
number of capacitors (
N
) required can be estimated by:
Equation 7. Number of Capacitors Required
N
L
L
n
=
/
where
L
is the inductance of a single capacitor and
L
is
the inductance required that was calculated above.
For example, to meet a 0.3A/ns di/dt and not produce
more than 60 mV of noise due to high frequency
capacitor inductance (1.9 nH from Table 5) one would
simply plug into Equation 6 and Equation 7.
Equation 8. Inductance Allowed
L
V
A ns
nH
=
÷
=
0 060
.
03
.
0 2
.
Equation 9. Number of Capacitors for 0.2 nH
N
nH
nH
capacitors
10
=
÷
=
19
.
02
.
1
Footnote
1 More capacitors will actually be required to achieve the
necessary capacitance prior to the voltage regulator
module due to the limited space within a 1206 package.
The number of capacitors required for a Pentium Pro
processor is therefore “capacitance dependent”.