參數(shù)資料
型號： P62000NLG8
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 穩(wěn)壓器
英文描述： DUAL SWITCHING CONTROLLER, QCC64
封裝： ROHS COMPLIANT, QFN-64
文件頁數(shù)： 32/62頁
文件大小： 1221K
代理商： P62000NLG8
IDTP62000
2/3/4-PHASE PWM CONTROLLER WITH DYNAMIC VOLTAGE & FREQUENCY SCALING
IDT 2/3/4-PHASE PWM CONTROLLER WITH DYNAMIC VOLTAGE & FREQUENCY SCALING
38
IDTP62000
REV E 050510
CONFIDENTIAL
Table 11: SIF Command Set
PSI Status – Command Code: 01h, Data: 00h, 01h
The IDTP62000 has a PSI# input pin which is driven by the CPU to indicate that the CPU has entered its internal power
down state. There is no CSR mechanism to disable this command. On assertion of PSI#, the IDTP62000 passes this
command to the 9CPS4592 with the data value of 01h. On deassertion of PSI#, the IDTP62000 resends the command with
a data payload of 00h. The sending of these SIF commands coincides with the setting and resetting of the CSR bit PSI#
(PSI_CTRL[6]).
DFC/DVC – Command Code: 05h, Data: 00~03h, 10~13h
The IDTP62000 sends this command anytime the DVC level changes due to crossing a new DVC threshold. If forced to a
new DVC level by some other means (for example, receiving a VR_FAN alert and going to DVC00), then no DFC/DVC
command is sent. There is no means for using the SIF interface to tell the 9CPS4592 if DVC mode has been turned on or
off, other than passing information about the present DVC level. See Section 3.0 for more details.
OCP: Over-Current Protection – Command Code: 06h, Data: 00h, 01h
The IDTP62000 sends this command to the 9CPS4592 with a data payload of 01h immediately after an over-current shut
down event has been detected. This command can be disabled by the IDTP62000 register setting (SIF_CMD_EN[3]). The
command is cleared when the OCP event is cleared and PGOOD is high. The sending of these SIF commands will be
entirely independent of the setting and resetting of the CSR bit OCP_ALERT.
OVP: Over-Voltage Protection – Command Code: 07h, Data: 00h, 01h
The IDTP62000 sends this command to the 9CPS4592 with a data payload of 01h immediately after an over-voltage event
has been detected. This command can be disabled by the IDTP62000 register setting (SIF_CMD_EN[2]). The command is
cleared when the OVP event is cleared and PGOOD is high. The sending of these SIF commands will be entirely
independent of the setting and resetting of the CSR bit OVP_ALERT.
From Master Side
From Slave Side
Command Function description
Data
(hex) Function description
Ack
Slave
Feedback
00
Slave Device Detection
Reserved for future design
01
PSI status
00~01
PSI status
00: PSI Inactive, 01: PSI Active
A
x
02
Mode
00~FF Reserved for future design
A
x
03
PWM total phase number
00~0F Reserved for future design
A
x
04
Dynamic active phase number
00~0F Reserved for future design
A
x
05
DFC/DVC
00~03
or
10~13
The data byte reflect DVC/DFC registers
as DFC00/DVC00 to DFC11/DVC11
Bit4 is indicator bit for timer usage
A
x
06
OCP: Over-Current Protection
00~01 PWM Over-Current Protection active
00 = Normal, 01 = OCP active
A
x
07
OVP: Over-Voltage Protection
00~01 PWM Over-Voltage Protection active
00 = Normal, 01 = OVP active
A
x
08
VR_HOT Alert
00~01 00 = Normal, 01 = VR_HOT active
A
x
09
VR_FAN Alert
00~01 00 = Normal, 01 = VR_FAN active
A
x
0A
VID data
00~FF Reserved for future design
A
x
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