參數(shù)資料
型號(hào)： P62000NLG8
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 穩(wěn)壓器
英文描述： DUAL SWITCHING CONTROLLER, QCC64
封裝： ROHS COMPLIANT, QFN-64
文件頁數(shù)： 15/62頁
文件大?。?/td> 1221K
代理商： P62000NLG8
IDTP62000
2/3/4-PHASE PWM CONTROLLER WITH DYNAMIC VOLTAGE & FREQUENCY SCALING
IDT 2/3/4-PHASE PWM CONTROLLER WITH DYNAMIC VOLTAGE & FREQUENCY SCALING
22
IDTP62000
REV E 050510
CONFIDENTIAL
Figure 18: A Change Across a DEC Threshold Level for >50% Time Duration is Necessary to Trigger
Transition
If the load demand increases, all the necessary phases are turned on at the same time. However as the processor load
decreases, DEC disables one phase at a time (after a programmable delay) as each DEC level is crossed. The delay
comparison period is separately programmable to ensure that the load current remains at the new level long enough to justify
a change in the active number of phases.
Figure 19: Normal Operation in DEC Mode
If either an undershoot in VCORE or 50% of the OCP average is detected, DEC mode is exited and the maximum number
of phases is immediately reactivated. Once both of these conditions no longer exist, normal DEC operation automatically
DEC_LEVEL_N (H)
DEC_LEVEL_N (L)
Programmable Window
Current Load
N Phase Active
N+1 Phase Active
N+1 Phase
Active
DEC_LEVEL_1 (H)
DEC_LEVEL_1 (L)
2 Phases
Active
DEC_LEVEL_2 (H)
DEC_LEVEL_2 (L)
DEC_LEVEL_3 (H)
DEC_LEVEL_3 (L)
Programmable
Delay
3 Phases Active
4 Phases Active
3 Phases
Active
Exit DEC Mode
Enter DEC Mode
1 Phase Active
4 Phases Active
Programmable Window
Current Load
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