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參數(shù)資料
| 型號： | MT90883 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | TDM to Packet Processors |
| 中文描述： | TDM到分組處理器 |
| 文件頁數(shù)： | 2/97頁 |
| 文件大?。?/td> | 702K |
| 代理商： | MT90883 |
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MT90880/1/2/3
Data Sheet
2
Zarlink Semiconductor Inc.
Description
The MT9088x is a family of highly functional TDM to Packet bridging devices. It provides a bridge between a WAN
environment based on constant bit rate TDM streams and a packet domain based on Ethernet technology.
It is capable of assembling user-defined packets of TDM traffic from the WAN Access Interface and transmitting
them from the Ethernet interfaces using a variety of protocols. If external processing is required (e.g., HDLC or
modem termination) the traffic can be switched to a local interface using the internal TDM switch.
Packets received from the Ethernet interfaces are parsed to determine the egress destination, and are
appropriately queued either to the WAN Access Interface or to the PCI interface. An integrated DMA controller is
used to transfer packets to and from the PCI interface with a minimum of CPU intervention.
Variants
There are four device variants in the MT9088x family:
MT908801024 bi-directional channels, integral TDM switch
MT908811024 bi-directional channels, no TDM switch
MT90882256 bi-directional channels, integral TDM switch
MT90883256 bi-directional channels, no TDM switch
Table 1 - Variant Options
Related Documents
This data sheet should be read in conjunction with the following related documents and application notes:
Table 2 - Related Documents
Feature
MT90880
32
Yes
1024
Master mode only
33 / 66 MHz
Yes
Yes
Yes
MT90881
32
No
1024
Not Available
33 / 66 MHz
Yes
Yes
Yes
MT90882
8
Yes
256
Master mode only
33 / 66 MHz
Yes
Yes
Yes
MT90883
8
No
256
Not Available
33 / 66 MHz
Yes
Yes
Yes
No. of WAN streams
Local Port
No. of Available Channels
TDM Switch Availability
PCI Interface
MII Interface
RMII Interface
JTAG
Title
Author
Document
Number
DM5708
DM5805
AN5789
Issue / Date
1. MT9088x Programmers Model
2. MT9088x API User Guide
3. MSAN-198 - Performing Clock Recovery for Circuit
Emulation when using the MT90880
4. MSAN-199 - Unstructured Circuit Emulation Using the
MT90880
5. MSAN-200 - MT90880 TDM Replacement Packet
Backplane
Zarlink
Zarlink
Zarlink
1.0, Aug. 2002
1.0, Sept. 2002
1, Aug. 2002
Zarlink
AN5790
1, Aug. 2002
Zarlink
AN5791
1, Aug. 2002
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT91600 | Programmable SLIC |
| MT91600AN | Programmable SLIC |
| MT91600AN1 | Programmable SLIC |
| MT91600ANR | Programmable SLIC |
| MT91600ANR1 | Programmable SLIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90883A | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors |
| MT90883A/IG | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors |
| MT90883BP1N | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors |
| MT90883IG | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors |
| MT9088IG | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:TDM to Packet Processors |
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