參數(shù)資料
型號(hào)： MT90870
廠商： Zarlink Semiconductor Inc.
英文描述： Flexible 12 k Digital Switch (F12kDX)
中文描述： 靈活的12畝數(shù)字交換機(jī)（F12kDX）
文件頁(yè)數(shù)： 68/86頁(yè)
文件大小： 2093K
代理商： MT90870
MT90870
Data Sheet
68
Zarlink Semiconductor Inc.
13.13 Backplane Bit Rate Registers
13.13.1 Backplane Input Bit Rate Registers (BIBRR0-31)
Address 010Dh to 012Ch
Thirty-two Backplane Input Bit Rate Registers allow the bit rate for each individual stream to be set to 2, 4, 8 or 16
Mb/s. These registers may be overridden by setting 32 Mb/s mode in the control register, in which case, Backplane
streams 0-15 will operate at 32 Mb/s and Backplane streams 16-31 will be unused. The
BIBRR
registers are
configured as follows:
13.13.2 Backplane Output Bit Rate Registers (BOBRR0-31)
Address 012Dh to 014Ch
Thirty-two Backplane Output Bit Rate Registers allow the bit rate for each individual stream to be set to 2, 4, 8 or 16
Mb/s.These registers may be overridden by setting 32 Mb/s mode in the control register, in which case, Backplane
streams 0-15 will operate at 32 Mb/s and Backplane streams 16-31 will be unused. The
BOBRR
registers are
configured as follows:
BIBRn Bit
(
for n=0 to 31)
Name
Reset
Description
15-2
Reserved
0
Reserved
1-0
BIBR(1:0)
0
Backplane Input Bit Rate
Table 45 - Backplane Input Bit Rate Register (BIBRRn) Bits
BIBR1
BIBR0
Bit rate for stream n
0
0
2 Mb/s
0
1
4 Mb/s
1
0
8 Mb/s
1
1
16 Mb/s
Table 46 - Backplane Input Bit Rate (BIBR) Programming Table
BOBRn Bit
(for n=0 to 31)
Name
Reset
Description
15-2
Reserved
0
Reserved
1-0
BOBR(1:0)
0
Backplane Output Bit Rate
Table 47 - Backplane Output Bit Rate Register (BOBRRn) Bits
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