參數(shù)資料
型號(hào)： MT90870
廠商： Zarlink Semiconductor Inc.
英文描述： Flexible 12 k Digital Switch (F12kDX)
中文描述： 靈活的12畝數(shù)字交換機(jī)（F12kDX）
文件頁(yè)數(shù)： 64/86頁(yè)
文件大?。?/td> 2093K
代理商： MT90870
MT90870
Data Sheet
64
Zarlink Semiconductor Inc.
13.10.3 Local Receive BER Length Register (LRXBLR)
Address 00C5h
Local BER Receive Length Register (
LRXBLR
) defines how many channels the BER sequence will be received
during each frame. The
LRXBLR
register is configured as follows:
13.10.4 Local BER Start Receive Register (LBSRR)
Address 00C6h
Local BER Start Receive Register defines the Input Stream and Start Channel and the stream in which the BER
sequence shall be received. The
LBSRR
register is configured as follows:
7-0
LTXBL(7:0)
0
Local Transmit BER Length Bits
The binary value of these bits define the number of channels in addition to the
Start Channel that the BER data will be transmitted on. (i.e. Total Channels =
Start Channel + LTXBL value)
Bit
Name
Reset
Description
15-8
Reserved
0
Reserved
.
7-0
LRXBL(7:0)
0
Local Receive BER Length Bits
The binary value of these bits define the number of channels in addition to
the Start Channel allocated for the BER receiver. (i.e. Total Channels =
Start Channel + LRXBL value)
Table 33 - Local Receive BER Length Register (LRXBLR) Bits
Bit
Name
Reset
Description
15-12
Reserved
0
Reserved.
11-8
LBRSA(3:0)
0
Local BER Receive Stream Address Bits
The binary value of these bits refers to the Local input stream to receive
the BER data.
7-0
LBRCA(7:0)
0
Local BER Receive Channel Address Bits
The binary value of these bits refers to the Local input channel in which
the BER data starts to be compared.
Table 34 - Local BER Start Receive Register (LBSRR) Bits
Bit
Name
Reset
Description
Table 32 - Local Transmit BER Length Register (LTXBLR) Bits
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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MT90871AV 制造商:Microsemi Corporation 功能描述:FLEXIBLE 8K DIGITAL SWITCH 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH F8KDX 196PBGA 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH F8KDX 196PBGA
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