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參數(shù)資料
| 型號(hào)： | MSC8101M1375C |
| 廠商： | MOTOROLA INC |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | Network Digital Signal Processor |
| 中文描述： | 64-BIT, 68.75 MHz, OTHER DSP, PBGA332 |
| 封裝： | 17 X 17 MM, LIDDED FLIP CHIP, PLASTIC, BGA-332 |
| 文件頁數(shù)： | 18/104頁 |
| 文件大小： | 877K |
| 代理商： | MSC8101M1375C |
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MSC8101 Technical Data, Rev. 16
1-14
Freescale Semiconductor
Signals/Connections
PSDA10
PGPL0
Output
Output
Bus SDRAM A10
Output from the bus SDRAM controller. This pin is part of the address when a row address is driven.
It is part of the command when a column address is driven.
Bus UPM General-Purpose Line 0
One of six general-purpose output lines of the UPM. The values and timing of this pin are
programmed in the UPM.
PSDWE
PGPL1
Output
Output
Bus SDRAM Write Enable
Output from the bus SDRAM controller. This pin should connect to the SDRAM WE input signal.
Bus UPM General-Purpose Line 1
One of six general-purpose output lines from the UPM. The values and timing of this pin are
programmed in the UPM.
POE
PSDRAS
PGPL2
Output
Output
Output
Bus Output Enable
Output of the bus GPCM. Controls the output buffer of memory devices during read operations.
Bus SDRAM RAS
Output from the bus SDRAM controller. This pin should connect to the SDRAM Row Address Strobe
(RAS) input signal.
Bus UPM General-Purpose Line 2
One of six general-purpose output lines from the UPM. The values and timing of this pin are
programmed in the UPM.
PSDCAS
PGPL3
Output
Output
Bus SDRAM CAS
Output from the bus SDRAM controller. This pin should connect to the SDRAM Column Address
Strobe (CAS) input signal.
Bus UPM General-Purpose Line 3
One of six general-purpose output lines from the UPM. The values and timing of this pin are
programmed in the UPM.
PGTA
PUPMWAIT
PPBS
PGPL4
Input
Input
Output
Output
GPCM TA
Terminates transactions during GPCM operation. Requires an external pull up resistor for proper
operation.
Bus UPM Wait
Input to the UPM. An external device can hold this pin high to force the UPM to wait until the device
is ready for the operation to continue.
Bus Parity Byte Select
In systems that store data parity in a separate chip, this output is the byte-select for that chip.
Bus UPM General-Purpose Line 4
One of six general-purpose output lines from the UPM. The values and timing of this pin are
programmed in the UPM.
PSDAMUX
PGPL5
Output
Output
Bus SDRAM Address Multiplexer
Controls the SDRAM address multiplexer when the MSC8101 is in External Master mode.
Bus UPM General-Purpose Line 5
One of six general-purpose output lines from the UPM. The values and timing of this pin are
programmed in the UPM.
Table 1-6.
Memory Controller Signals (Continued)
Signal
Data Flow
Description
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| MSC8101M1375F | 功能描述:DSP 16BIT 275MHZ CPM 332-FCPBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:StarCore 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點(diǎn) 接口:I²C，McASP，McBSP 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| MSC8101M1500F | 功能描述:DSP 16BIT 300MHZ CPM 332-FCPBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:StarCore 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點(diǎn) 接口:I²C，McASP，McBSP 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| MSC8101UG/D | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Network Digital Signal Processor |
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