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參數(shù)資料
| 型號(hào)： | MSC8101M1375C |
| 廠商： | MOTOROLA INC |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | Network Digital Signal Processor |
| 中文描述： | 64-BIT, 68.75 MHz, OTHER DSP, PBGA332 |
| 封裝： | 17 X 17 MM, LIDDED FLIP CHIP, PLASTIC, BGA-332 |
| 文件頁數(shù)： | 15/104頁 |
| 文件大?。?/td> | 877K |
| 代理商： | MSC8101M1375C |
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System Bus, HDI16, and Interrupt Signals
MSC8101 Technical Data, Rev. 16
Freescale Semiconductor
1-11
IRQ1
DP1
EXT_BG2
Input
Input/Output
Output
Interrupt Request 1
1
One of eight external lines that can request a service routine, via the internal interrupt controller,
from the SC140 core.
Data Parity 1
1
The agent that drives the data bus also drives the data parity signals. The value driven on the data
parity one pin should give odd parity (odd number of ones) on the group of signals that includes data
parity 1 and D[8–15].
External Bus Grant 2
1,2
The MSC8101 asserts this pin to grant bus ownership to an external bus master.
IRQ2
DP2
EXT_DBG2
Input
Input/Output
Output
Interrupt Request 2
1
One of eight external lines that can request a service routine, via the internal interrupt controller,
from the SC140 core.
Data Parity 2
1
The agent that drives the data bus also drives the data parity signals. The value driven on the data
parity two pin should give odd parity (odd number of ones) on the group of signals that includes data
parity 2 and D[16–23].
External Data Bus Grant 2
1,2
The MSC8101 asserts this pin to grant data bus ownership to an external bus master.
IRQ3
DP3
EXT_BR3
Input
Input/Output
Input
Interrupt Request 3
1
One of eight external lines that can request a service routine, via the internal interrupt controller,
from the SC140 core.
Data Parity 3
1
The agent that drives the data bus also drives the data parity signals. The value driven on the data
parity three pin should give odd parity (odd number of ones) on the group of signals that includes
data parity 3 and D[24–31].
External Bus Request 3
1,2
An external master asserts this pin to request bus ownership from the internal arbiter.
IRQ4
DP4
DREQ3
EXT_BG3
Input
Input/Output
Input
Output
Interrupt Request 4
1
One of eight external lines that can request a service routine, via the internal interrupt controller,
from the SC140 core.
Data Parity 4
1
The agent that drives the data bus also drives the data parity signals. The value driven on the data
parity four pin should give odd parity (odd number of ones) on the group of signals that includes data
parity 4 and D[32–39].
DMA Request 3
1
An external peripheral uses this pin to request DMA service.
External Bus Grant 3
1,2
The MSC8101 asserts this pin to grant bus ownership to an external bus master.
Table 1-5.
System Bus, HDI16, and Interrupt Signals (Continued)
Signal
Data Flow
Description
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