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參數(shù)資料
| 型號(hào)： | MC68HC08GP8AMFB |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁(yè)數(shù)： | 9/126頁(yè) |
| 文件大?。?/td> | 4243K |
| 代理商： | MC68HC08GP8AMFB |
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Low-Power Modes
Data Sheet
MC68HC08GP8A
106
Low-Power Modes
MOTOROLA
If the oscillator has not been enabled to operate in stop mode, the timebase module
will not be active during stop mode. In stop mode, the timebase register is not
accessible by the CPU.
If the timebase functions are not required during stop mode, reduce the power
consumption by stopping the timebase before enabling the STOP instruction.
9.14 Exiting Wait Mode
These events restart the CPU clock and load the program counter with the reset
vector or with an interrupt vector:
External reset — A logic 0 on the RST pin resets the MCU and loads the
program counter with the contents of locations $FFFE and $FFFF.
External interrupt — A high-to-low transition on an external interrupt pin
(IRQ pin) loads the program counter with the contents of locations: $FFFA
and $FFFB; IRQ pin.
Break interrupt — A break interrupt loads the program counter with the
contents of $FFFC and $FFFD.
Computer operating properly module (COP) reset — A timeout of the COP
counter resets the MCU and loads the program counter with the contents of
$FFFE and $FFFF.
Low-voltage inhibit module (LVI) reset — A power supply voltage below the
VTRIPF voltage resets the MCU and loads the program counter with the
contents of locations $FFFE and $FFFF.
Clock generator module (CGM) interrupt — A CPU interrupt request from
the phase-locked loop (PLL) loads the program counter with the contents of
$FFF8 and $FFF9.
Keyboard module (KBI) interrupt — A CPU interrupt request from the KBI
module loads the program counter with the contents of $FFE0 and $FFE1.
Timer 1 interface module (TIM1) interrupt — A CPU interrupt request from
the TIM1 loads the program counter with the contents of:
–
$FFF2 and $FFF3; TIM1 overflow
–
$FFF4 and $FFF5; TIM1 channel 1
–
$FFF6 and $FFF7; TIM1 channel 0
Timer 2 interface module (TIM2) interrupt — A CPU interrupt request from
the TIM2 loads the program counter with the contents of:
–
$FFEC and $FFED; TIM2 overflow
–
$FFEE and $FFEF; TIM2 channel 1
–
$FFF0 and $FFF1; TIM2 channel 0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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