參數(shù)資料
型號(hào): MC68HC08GP8AMFB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8.2 MHz, MICROCONTROLLER, PQFP44
封裝: PLASTIC, QFP-44
文件頁(yè)數(shù): 28/126頁(yè)
文件大?。?/td> 4243K
代理商: MC68HC08GP8AMFB
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Input/Output Ports (PORTS)
Port B
MC68HC08GP8A
Data Sheet
MOTOROLA
Input/Output Ports (PORTS)
123
which port B pin will be used as an ADC input and overrides any control from
the port I/O logic by forcing that pin as the input to the analog circuitry.
NOTE:
Care must be taken when reading port B while applying analog voltages to
AD7–AD0 pins. If the appropriate ADC channel is not enabled, excessive current
drain may occur if analog voltages are applied to the PTBx/ADx pin, while PTB is
read as a digital input. Those ports not selected as analog input channels are
considered digital I/O ports.
12.3.2 Data Direction Register B
Data direction register B (DDRB) determines whether each port B pin is an input or
an output. Writing a logic 1 to a DDRB bit enables the output buffer for the
corresponding port B pin; a logic 0 disables the output buffer.
DDRB7–DDRB0 — Data Direction Register B Bits
These read/write bits control port B data direction. Reset clears
DDRB7–DDRB0, configuring all port B pins as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
NOTE:
Avoid glitches on port B pins by writing to the port B data register before changing
data direction register B bits from 0 to 1.
Figure 12-8 shows the port B I/O logic.
Figure 12-8. Port B I/O Circuit
Address:
$0005
Bit 7
654321
Bit 0
Read:
DDRB7
DDRB6
DDRB5
DDRB4
DDRB3
DDRB2
DDRB1
DDRB0
Write:
Reset:
00000000
Figure 12-7. Data Direction Register B (DDRB)
READ DDRB ($0005)
WRITE DDRB ($0005)
RESET
WRITE PTB ($0001)
READ PTB ($0001)
PTBx
DDRBx
PTBx
INTERNA
LD
A
TA
BUS
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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