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參數(shù)資料
| 型號： | MC68HC05T16B |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56 |
| 封裝： | PLASTIC, SDIP-56 |
| 文件頁數(shù)： | 65/128頁 |
| 文件大小： | 734K |
| 代理商： | MC68HC05T16B |
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MC68HC05T16
MOTOROLA
4-11
RESETS AND INTERRUPTS
4
VFLB - VFLBK status
1 (set)
–
Vertical yback (leading edge) signal detected.
0 (clear) –
No Vertical yback signal detected.
RiCF - Row i display status
1 (set)
–
Row i display has been terminated.
0 (clear) –
Row i display has been not terminated.
Whenever a row display has been terminated, the corresponding RiCF ag will be set along with
update of CDRC3-CDRC0 eld.
Refer to section 9 for detailed description of On-Screen Display.
4.2.8
Multi-Function Timer Interrupts
There are two different interrupting sources, TOF and RTIF bits of Multi-Function Timer Register,
in this module. The interrupt service routine address is specied by the contents of memory
location $FFF0 and $FFF1.
TOF - Timer Overow
1 (set)
–
8-bit ripple timer overow has occurred.
0 (clear) –
No 8-bit ripple timer overow has occurred.
This bit is set when the 8-bit ripple counter overows from $FF to $00; a timer overow interrupt
will occur, if TOFIE (bit 5) is set. TOF is cleared by writing a ‘0’ to the bit.
RTIF - Real Time Interrupt Flag
1 (set)
–
A real time interrupt has occurred.
0 (clear) –
A real time interrupt has not occurred.
A RTIF indicates when the output of the RTI circuit goes active. The clock frequency that drives
the RTI circuit is E/16384 giving a maximum interrupt period of 3.9ms at a bus rate of 4.2MHz. A
CPU interrupt request will be generated if RTIE is set. RTIE is cleared by writing a ‘0’ to the bit.
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Multi-Function Timer
$1C
TOF
RTIF
TOFIE
RTIE
IRQN WDOG
RT1
RT0
0000 0011
TPG
39
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