參數(shù)資料
型號: MC68HC05T16B
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56
封裝: PLASTIC, SDIP-56
文件頁數(shù): 110/128頁
文件大?。?/td> 734K
代理商: MC68HC05T16B
MOTOROLA
9-12
MC68HC05T16
ON-SCREEN DISPLAY
9
9.4.3
Row Horizontal Position Register
SHDW - Shadow/border select
1 (set)
Shadow feature is selected if RiBE is enabled. See Section 9.4.1.
0 (clear) –
Border feature is selected if RiBE is disabled. See Section 9.4.1.
HP6 to HP0 - Horizontal Position
Each (HP6-HP0) step shifts the horizontal position of all four rows by 4 dots. The reference point
of shift is the leading edge of horizontal yback signal. Note that there is only one Row Horizontal
Position register for all 4 row buffers, therefore all rows will have the same horizontal start point.
If (HP6-HP0) is so programmed that part of the row display goes beyond the beginning of a
horizontal yback signal, display wrap-around occurs. That is, all lines of the row display will have
all dots before the nth horizontal yback displayed on one line and all remaining dots after the nth
horizontal yback, along with all dots of next line before the (n+1)th horizontal yback displayed
on the next line.
9.4.4
Row Control Register 1
RiINTE - Row interrupt
1 (set)
Row interrupt enabled.
0 (clear) –
Row interrupt disabled.
Enable/disable interrupt of row i if one of the following conditions occur:
1) the part of the row i display which is not overridden by other overlapping
rows has been completed, or
2) the part of the row i display which does not overlap vertical retrace period
has been completed.
Note that for the case where row i is completely overlapped by other rows, row i display has never
really happened, that is, terminated upon its commencement, row i interrupt will never occur.
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$28
SHDW
HP6
HP5
HP4
HP3
HP2
HP1
HP0
0000 0000
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$29
R3INTE
R2INTE
R1INTE
R0INTE
R3EN
R2EN
R1EN
R0EN
0000 0000
TPG
80
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