參數(shù)資料
型號(hào)： MC68HC05F4FB
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 1.789 MHz, MICROCONTROLLER, PQFP44
封裝： QFP-44
文件頁數(shù)： 66/130頁
文件大?。?/td> 2089K
代理商： MC68HC05F4FB
MOTOROLA
4-2
MC68HC05F4
PARALLEL INPUT/OUTPUT PORTS
4
4.2
Port A
Port A is an 8-bit bidirectional port which is equipped with a keyboard interrupt. All eight lines have
internal pull-up resistors, which are required when the port is in input mode. On reset, this port is
congured as a standard I/O port comprising a data register and a data direction register.
Reset does not affect the state of the data register, but clears the data direction register, thereby
returning all ports pins to input mode. Writing a 1 to any DDR bit sets the corresponding port pin
to output mode. As every pin congured as an input contributes to the keyboard interrupt, it is
possible to disable a single pin by conguring it as an output.
4.2.1
Keyboard interrupt
Provided that the interrupt mask bit of the condition code register is cleared, the keyboard interrupt
facility is enabled by setting the keyboard interrupt bit (KIE) in the Key Control register.
On detection of a high-to-low transition, the interrupt inputs PA6 and PA7 are triggered. The trigger
edges of the interrupt lines, PA0–PA5, can be programmed using the EDG0–EDG5 bits in the Key
Control register. If one of these bits is cleared, after reset the corresponding interrupt is
falling-edge sensitive. If, however, one of them is set, after reset the corresponding interrupt is
rising-edge sensitive. The internal pull-up resistors of input lines, PA7–PA0, are disabled, if
rising-edge sensitivity is selected.
When a correct transition is detected, on any of this port’s pins, a keyboard interrupt request is
generated, and the corresponding interrupt status ag of the interrupt status register, IRSTATE, is
set. The interrupt status register is an 8-bit register which has the same address as PORTA,
$0000. This register can be read if the KEYMUX bit in the system option register is set. If KIE is
set, a keyboard interrupt is generated and the keyboard status ag, KF, is set by generating the
logical OR of the eight interrupt state register outputs.
The 8 interrupt state register ags can be reset in three ways:
1) Completely, if the chip is reset.
2) Completely, if a 1 is written to KEYCLR, in the system option register.
3) Individually, if a 1 is written to the corresponding bit position of the interrupt
state register ($00 with KEYMUX = 1, in the system option register).
TPG
36
05F4Book Page 2 Tuesday, August 5, 1997 1:10 pm
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PDF描述
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