參數(shù)資料
型號: MC68HC05F4FB
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 1.789 MHz, MICROCONTROLLER, PQFP44
封裝: QFP-44
文件頁數(shù): 60/130頁
文件大?。?/td> 2089K
代理商: MC68HC05F4FB
MC68HC05F4
MOTOROLA
3-5
MEMORY AND REGISTERS
3
ER1, ER0 — Erase select bits
ER1 and ER0 are used to select either single byte programming or one of three erase modes:
byte, block, or bulk. Table 3-2 shows the mode selected for each bit conguration. These bits are
readable and writable and are cleared by reset.
In byte erase mode, only the selected byte is erased.
In block erase mode, a 64-byte block of EEPROM is erased. The EEPROM
memory space is divided into four 64-byte blocks ($0200 – $023F, $0240 –
$027F, $0280 – $02BF and $02C0 – $02FF) and performing a block erase
on any address within a block will erase the entire block.
In bulk erase mode, the entire 256 bytes of EEPROM are erased.
LATCH — EEPROM latch bit
1 (set)
EEPROM address and data buses are congured for programming.
0 (clear) –
EEPROM address and data buses are congured for normal
operation.
When set, the LATCH bit congures the EEPROM address and data buses for programming. In
addition, writes to the EEPROM array cause the address and data buses to be latched. This bit is
readable and writable, but reads from the EEPROM array are inhibited if the LATCH bit is set and
a write to the EEPROM space has taken place. When this bit is clear, address and data buses are
congured for normal operation. Reset clears this bit.
EERC — EEPROM RC oscillator control
1 (set)
Use internal RC oscillator for EEPROM.
0 (clear) –
Use CPU clock for EEPROM.
When this bit is set, the EEPROM memory array uses the internal RC oscillator instead of the CPU
clock. After setting the EERC bit, the user should wait a time tRCON to allow the RC oscillator to
stabilize. This bit is readable and writable and should be set by the user when the internal bus
frequency falls below 1.5MHz. Reset clears this bit.
Table 3-2 Erase modes
ER1
ER0
Mode
0
Program
0
1
Byte erase
1
0
Block erase
1
Bulk erase
TPG
31
05F4Book Page 5 Tuesday, August 5, 1997 1:10 pm
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