參數(shù)資料
型號: MC68HC05F4FB
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 1.789 MHz, MICROCONTROLLER, PQFP44
封裝: QFP-44
文件頁數(shù): 104/130頁
文件大?。?/td> 2089K
代理商: MC68HC05F4FB
MC68HC05F4
MOTOROLA
8-1
RESETS AND INTERRUPTS
8
RESETS AND INTERRUPTS
8.1
Resets
The MC68HC05F4 can be reset in ve ways: by the initial power-on reset function, by an active
low input to the RESET pin, by an on-chip low voltage reset, by an opcode fetch from an illegal
address, and by a COP watchdog timer reset. Any of these resets will cause the program to return
to its starting address, specied by the contents of memory locations $3FFE and $3FFF, and
cause the interrupt mask of the CCR to be set.
8.1.1
Power-on reset
A power-on reset occurs when a positive transition is detected on VDD. The power-on reset
function is strictly for power turn-on conditions and should not be used to detect drops in the power
supply voltage. The power-on circuitry provides a stabilization delay (tPORL) from when the
oscillator becomes active. If the external RESET pin is low at the end of this delay then the
processor remains in the reset state until RESET goes high.
8.1.2
RESET pin
When the oscillator is running in a stable state, the MCU is reset when a logic zero is applied to
the RESET input for a minimum period of 1.5 machine cycles (tCYC). This pin contains an internal
Schmitt trigger as part of its input to improve noise immunity. When the reset pin goes high, the
MCU will resume operation on the following cycle. The RESET pin is also an output device for the
internal low voltage reset.
TPG
71
05F4Book Page 1 Tuesday, August 5, 1997 1:10 pm
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