參數(shù)資料
型號(hào)： MC68CK338CPV14B1
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 14.4 MHz, MICROCONTROLLER, PQFP144
封裝： PLASTIC, TQFP-144
文件頁(yè)數(shù)： 86/133頁(yè)
文件大?。?/td> 944K
代理商： MC68CK338CPV14B1
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MOTOROLA
MC68CK338
56
MC68CK338TS/D
4.7 Background Debugging Mode
The background debugger on the CPU32L is implemented in CPU microcode. The background debug-
ging commands are summarized in Table 34.
Table 34 Background Debugging Mode Commands
Command
Mnemonic
Description
Read D/A Register
RDREG/RAREG
Read the selected address or data register and return
the results through the serial interface.
Write D/A Register
WDREG/WAREG
The data operand is written to the specified address or
data register.
Read System Register
RSREG
The specified system control register is read. All regis-
ters that can be read in supervisor mode can be read in
background mode.
Write System Register
WSREG
The operand data is written into the specified system
control register.
Read Memory Location
READ
Read the sized data at the memory location specified
by the long-word address. The source function code
register (SFC) determines the address space access-
ed.
Write Memory Location
WRITE
Write the operand data to the memory location speci-
fied by the long-word address. The destination function
code (DFC) register determines the address space ac-
cessed.
Dump Memory Block
DUMP
Used in conjunction with the READ command to dump
large blocks of memory. An initial READ is executed to
set up the starting address of the block and retrieve the
first result. Subsequent operands are retrieved with the
DUMP command.
Fill Memory Block
FILL
Used in conjunction with the WRITE command to fill
large blocks of memory. Initially, a WRITE is executed
to set up the starting address of the block and supply
the first operand. The FILL command writes subse-
quent operands.
Resume Execution
GO
The pipe is flushed and refilled before resuming in-
struction execution at the current PC.
Patch User Code
CALL
Current program counter is stacked at the location of
the current stack pointer. Instruction execution begins
at user patch code.
Reset Peripherals
RST
Asserts RESET for 512 clock cycles. The CPU is not
reset by this command. Synonymous with the CPU RE-
SET instruction.
No Operation
NOP
NOP performs no operation and can be used as a null
command.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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