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| 型號： | MC68CK338CPV14B1 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 14.4 MHz, MICROCONTROLLER, PQFP144 |
| 封裝： | PLASTIC, TQFP-144 |
| 文件頁數(shù)： | 4/133頁 |
| 文件大?。?/td> | 944K |
| 代理商： | MC68CK338CPV14B1 |
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MC68CK338
MOTOROLA
MC68CK338TS/D
101
IN — Input Pin Status
In the DIS, IPWM, IPM and IC modes, this read-only status bit reflects the logic level on the input pin.
In the OCB, OCAB and OPWM modes, reading this bit returns the value latched on the output flip-flop,
after EDPOL polarity selection.
Writing to this bit has no effect.
FORCA — Force A
In the OCB, OCAB and OPWM modes, FORCA allows software to force the output flip-flop to behave
as if a successful comparison had occurred on channel A (except that the FLAG bit is not set). Writing
a one to FORCA sets the output flip-flop; writing a zero has no effect.
In the DIS, IPWM, IPM and IC modes, FORCA is not used and writing to it has no effect.
FORCA is cleared by reset, and always reads as zero.
NOTE
Writing a one to both FORCA and FORCB simultaneously resets the output flip-
flop.
FORCB — Force B
In the OCB, OCAB and OPWM modes, FORCB allows software to force the output flip-flop to behave
as if a successful comparison had occurred on channel B (except that the FLAG bit is not set). Writing
a one to FORCB sets the output flip-flop, writing a zero has no effect.
In the DIS, IPWM, IPM and IC modes, FORCB is not used and writing to it has no effect.
FORCB is cleared by reset, and always reads as zero.
NOTE
Writing a one to both FORCA and FORCB simultaneously resets the output flip-
flop.
EDPOL — Edge Polarity
EDPOL selects different options depending on the DASM operating mode. Refer to Table 61.
MODE[3:0] — DASM Mode Select
This bit field selects the operating mode of the DASM. Refer to Table 62.
Table 61 Edge Polarity
MODE
EDPOL
Function
DIS
X
EDPOL is not used in DIS mode
IPWM
0
Channel A captures on a rising edge
Channel B captures on a falling edge
1
Channel A captures on a falling edge
Channel B captures on a rising edge
IPM, IC
0
Channel A captures on a rising edge
1
Channel A captures on a falling edge
OCB, OCAB, OPWM
0
A compare on channel A sets the output pin to logic one
A compare on channel B clears the output pin to logic zero
1
A compare on channel A clears the output pin to logic zero
A compare on channel B sets the output pin to logic one
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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