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參數(shù)資料
| 型號： | M306H7MC-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100 |
| 文件頁數(shù)： | 76/115頁 |
| 文件大?。?/td> | 3146K |
| 代理商： | M306H7MC-XXXFP |
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Rev.2.10
Oct 25, 2006
Page 63 of 326
REJ03B0152-0210
M306H7MG-XXXFP/MC-XXXFP/FGFP
8. DMAC
Table 8.1
DMAC Specifications
Item
Specification
No. of channels
2 (cycle steal method)
Transfer memory space
From any address in the 1M bytes space to a fixed address
From a fixed address to any address in the 1M bytes space
From a fixed address to a fixed address
Maximum No. of bytes transferred
128K bytes (with 16-bit transfers) or 64K bytes (with 8-bit transfers)
DMA request factors
________
Falling edge of INT0 or INT1
(Note 1, Note 2)
________
Both edge of INT0 or INT1
Timer A0 to timer A4 interrupt requests
Timer B0 to timer B5 interrupt requests
UART0 transfer, UART0 reception interrupt requests
UART1 transfer, UART1 reception interrupt requests
UART2 transfer, UART2 reception interrupt requests
SI/O3, SI/O4 interrpt requests
A/D conversion interrupt requests
Software triggers
Channel priority
DMA0 > DMA1 (DMA0 takes precedence)
Transfer unit
8 bits or 16 bits
Transfer address direction
forward or fixed (The source and destination addresses cannot both be
in the forward direction.)
Transfer mode Single transfer Transfer is completed when the DMAi transfer counter (i = 0–1)
underflows after reaching the terminal count.
Repeat transfer When the DMAi transfer counter underflows, it is reloaded with the value
of the DMAi transfer counter reload register and a DMA transfer is con-
tinued with it.
DMA interrupt request generation timing When the DMAi transfer counter underflowed
DMA startup
Data transfer is initiated each time a DMA request is generated when the
DMAiCON register’s DMAE bit = “1” (enabled).
DMA shutdown Single transfer
When the DMAE bit is set to “0” (disabled)
After the DMAi transfer counter underflows
Repeat transfer When the DMAE bit is set to “0” (disabled)
When a data transfer is started after setting the DMAE bit to “1”
(enabled), the forward address pointer is reloaded with the value of the
SARi or the DARi pointer whichever is specified to be in the forward
direction and the DMAi transfer counter is reloaded with the value of the
DMAi transfer counter reload register.
Notes:
1. DMA transfer is not effective to any interrupt. DMA transfer is affected neither by the I flag nor by the
interrupt control register.
2. The selectable causes of DMA requests differ with each channel.
3. Make sure that no DMAC-related registers (addresses 002016 to 003F16) are accessed by the DMAC.
Reload timing for forward
address pointer and transfer
counter
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M306H7MG-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with DATA ACQUISITION CONTROLLER |
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| M306KAFCLRP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Description |
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