
Interrupts
Specifications in this manual are tentative and subject to change
Rev. E
MITSUBISHI MICROCOMPUTERS
M30245 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
50
Interrupts
Figure 1.29 lists the types of interrupts.
Maskable: An interrupt that can be enabled or disabled by the interrupt enable flag (I flag) or can have its
interrupt priority changed by the priority level.
Non-maskable: An interrupt that cannot be enabled or disabled by the interrupt enable flag (I flag) or cannot
have its interrupt priority changed by the priority level.
Software Interrupts
A software interrupt occurs when executing certain instructions. Software interrupts are non-maskable
interrupts.
Undefined instruction interrupt
An undefined instruction interrupt occurs when executing the UND instruction.
Overflow interrupt
An overflow interrupt occurs when an executing arithmetic instruction overflows. The instructions that set an
O flag when an overflow occurs are: ABS, ADC, ADCF, ADD, CMP, DIV, DIVU, DIVX, NEG, RMPA, SBB,
SHA, SUB
BRK interrupt
A BRK interrupt occurs when executing the BRK instruction.
INT interrupt
An INT interrupt occurs when specifying one of the software interrupt numbers 0 through 63 and executing
the INT instruction. Software interrupt numbers 0 through 31 are assigned to peripheral I/O interrupts, so
executing the INT instruction executes the same interrupt routine as the peripheral I/O interrupt.
The stack pointer (SP), used for the INT interrupt, is dependent on which software interrupt number is
selected.
As far as software interrupt numbers 0 through 31 are concerned, the microcomputer saves the stack
pointer assignment flag (U flag) when it accepts an interrupt request. The U flag is set to “0” selecting the
interrupt stack pointer then the interrupt sequence is executed. When returning from the interrupt routine,
the U flag is returned to its previous state before accepting the interrupt request.
As far as software numbers 32 through 63 are concerned, the stack pointer does not change.
Figure 1.29. Interrupt classification
Interrupt
Software
Hardware
Special
Peripheral I/O (Note)
Undefined instruction (UND instruction)
Overflow (INTO instruction)
BRK instruction
INT instruction
Reset
NMI
DBC
Watchdog timer
Single step
Address match
Note: Peripheral I/O interrupts are generated by the peripheral functions built into the microcomputer system.