
CPU Rewrite Mode
189
Specifications in this manual are tentative and subject to change
Rev. E
MITSUBISHI MICROCOMPUTERS
M30245 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Figure 1.141. Flash memory control register
Figure 1.142.
CPU rewrite mode set/reset flowchart
Bit Symbol
Bit Name
Function
R W
FMR00
FMR01
FMR02
FMR03
Reserved
FMR05
Nothing is assigned. Write "0" when writing to these bits.
The value is indeterminate if read.
RY/BY status bit
CPU rewrite mode select bit
(Note 1)
Lock bit disable bit
(Note 2)
Flash memory reset bit
(Note 3)
User ROM area select bit
(Note 4).
0 : Busy (overwrite or erase)
1 : Ready
0 : Normal mode
(invalid software commands)
1 : CPU rewrite mode
(software command accepted)
0 : Enabled
1 : Disabled
0 : Normal operation
1 : Reset
Must always be "0"
0 : Boot ROM area accessed
1 : User ROM area accessed
O O
Symbol
FMR0
Address
02F7
16
When reset
XX000001
16
Flash memory control register 0
b7
b5
b6
b4
b3
b2
b1
b0
O X
O O
_ _
O O
Note 1: To set this bit to "1", the user must write "0" and then "1" to it in succession. This bit
set to "1" unless this sequence has been performed. This is necessary to ensure th
interrupt or DMA transfer are executed during the interval. Use the control program e
in the internal flash memory for writing to this bit. Also, write to this bit when the NM
is "H" level.
Note 2: To set this bit to "1", the user must write "0" and then "1" to it in succession when the
rewrite mode select bit = "1". This bit is not set to "1" unless this sequence has been
performed. This is necessary to ensure that no interrupt or DMA transfer are execute
during the interval.
Note 3: Effective only when CPU rewrite mode select bit "1". Set this bit to "1" and then "0" i
succession.
Note 4: Effective only in boot mode. Use a control program that is not in the internal flash me
when writing to this bit.
0
End
Start
Execute read array command or reset flash
memory by setting flash memory reset bit (by
writing “1” and then “0” in succession) (Note 3)
Single-chip mode, memory expansion
mode, or boot mode
Set processor mode register (Note 1)
Using software command execute erase,
program, or other operation
(Set lock bit disable bit as required)
Jump to transferred control program in RAM
(Subsequent operations are executed by control
program in this RAM)
Transfer CPU rewrite mode control
program to internal RAM
Note 1: During CPU rewrite mode, set the main clock frequency as shown below using the main clock division
register (addresses 000616 and 000716):
6.25 MHz or less when wait bit (bit 7 at address 000516) = “0” (without internal access wait state)
12.5 MHz or less when wait bit (bit 7 at address 000516) = “1” (with internal access wait state)
Note 2: For CPU rewrite mode select bit to be set to “1”, the user needs to write a “0” and then a “1” to it in
succession. When it is not this procedure, it is not enacted in “1”. This is necessary to ensure that no
interrupt or DMA transfer will be executed during the interval. Use the program except in the internal
flash memory for write to this bit. Also write to this bit when NMI pin is "H" level.
Note 3: Before exiting the CPU rewrite mode after completing erase or program operation, always be sure to
execute a read array command or reset the flash memory.
Note 4: “1” can be set. However, when this bit is “1”, user ROM area is accessed.
(Boot mode only)
Write “0” to user ROM area select bit (Note 4)
Write “0” to CPU rewrite mode select bit
(Boot mode only)
Set user ROM area select bit to “1”
Set CPU rewrite mode select bit to “1” (by
writing “0” and then “1” in succession)(Note 2)
*1
Program in ROM
Program in RAM